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authorJeroen Hofstee <jeroen@myspectrum.nl>2014-06-18 21:22:35 +0200
committerTom Rini <trini@ti.com>2014-07-07 19:42:33 -0400
commit878cae6b0263576317fcd77bf903cb9e503e6cc7 (patch)
tree5abc91075454cb14b1a4e6265330870142ae0e7d /arch/arm
parent0b308f14f06bc464bbf9bf3566aca0e1eabffb33 (diff)
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ARM: emif4: wait for CM_DLL_READYST to be set
The code intends for the CM_DLL_READYST to be set, but actually polls till any bit is set since the logical AND is used instead of the bitwise one is used. Fix it. cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/armv7/am33xx/emif4.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c
index a7a3e88..8b7527c 100644
--- a/arch/arm/cpu/armv7/am33xx/emif4.c
+++ b/arch/arm/cpu/armv7/am33xx/emif4.c
@@ -115,7 +115,7 @@ void config_ddr(unsigned int pll, const struct ctrl_ioregs *ioregs,
#endif
#ifdef CONFIG_AM43XX
writel(readl(&cm_device->cm_dll_ctrl) & ~0x1, &cm_device->cm_dll_ctrl);
- while ((readl(&cm_device->cm_dll_ctrl) && CM_DLL_READYST) == 0)
+ while ((readl(&cm_device->cm_dll_ctrl) & CM_DLL_READYST) == 0)
;
writel(0x80000000, &ddrctrl->ddrioctrl);