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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-07-26 14:08:36 +0200 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-07-26 14:08:36 +0200 |
| commit | f2c8d7f591e28d3437155c7a6eae8c8d9e3fe552 (patch) | |
| tree | 00286cd23858a70dd0c526e5a47e50f2c125c3b3 /arch/arm | |
| parent | 772e173802627a1917a3f5878ad4b9b920089a33 (diff) | |
| parent | 327474915a413be98950deeeba27c3d17e5134bc (diff) | |
| download | u-boot-imx-f2c8d7f591e28d3437155c7a6eae8c8d9e3fe552.zip u-boot-imx-f2c8d7f591e28d3437155c7a6eae8c8d9e3fe552.tar.gz u-boot-imx-f2c8d7f591e28d3437155c7a6eae8c8d9e3fe552.tar.bz2 | |
Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/armv7/zynq/ddrc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/zynq/ddrc.c b/arch/arm/cpu/armv7/zynq/ddrc.c index e0ed3bf..1ea086d 100644 --- a/arch/arm/cpu/armv7/zynq/ddrc.c +++ b/arch/arm/cpu/armv7/zynq/ddrc.c @@ -34,7 +34,7 @@ void zynq_ddrc_init(void) /* ECC is enabled when memory is in 16bit mode and it is enabled */ if ((ecctype == ZYNQ_DDRC_ECC_SCRUBREG_ECCMODE_SECDED) && (width == ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT)) { - puts("Memory: ECC enabled\n"); + puts("ECC enabled "); /* * Clear the first 1MB because it is not initialized from * first stage bootloader. To get ECC to work all memory has @@ -42,6 +42,6 @@ void zynq_ddrc_init(void) */ memset((void *)0, 0, 1 * 1024 * 1024); } else { - puts("Memory: ECC disabled\n"); + puts("ECC disabled "); } } |