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| author | Jaehoon Chung <jh80.chung@samsung.com> | 2012-07-09 21:20:34 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-09-01 14:58:23 +0200 |
| commit | f8c5cfad7b2e9710d783a370ef5c6e6acae8c9e8 (patch) | |
| tree | 63844a04dfc30dc4b14e9e7cd7f82943ac6a5883 /arch/arm | |
| parent | 3936b4f0571b535558ee89038c37a93c1c2c23e6 (diff) | |
| download | u-boot-imx-f8c5cfad7b2e9710d783a370ef5c6e6acae8c9e8.zip u-boot-imx-f8c5cfad7b2e9710d783a370ef5c6e6acae8c9e8.tar.gz u-boot-imx-f8c5cfad7b2e9710d783a370ef5c6e6acae8c9e8.tar.bz2 | |
ARM: EXYNOS: fixed compiler warning message
Removed [-Wuninitialized] warning message.
The fout_sel is assigned to "-1" by default.
And start, gpio_func is initialized to 0.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/armv7/exynos/clock.c | 3 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/exynos/pinmux.c | 2 |
2 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 5b7e0ff..de3db8e 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -173,6 +173,9 @@ static unsigned long exynos5_get_pll_clk(int pllreg) fout_sel = (pll_div2_sel >> BPLL_FOUT_SEL_SHIFT) & BPLL_FOUT_SEL_MASK; break; + default: + fout_sel = -1; + break; } if (fout_sel == 0) diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c index e90ad6a..7776add 100644 --- a/arch/arm/cpu/armv7/exynos/pinmux.c +++ b/arch/arm/cpu/armv7/exynos/pinmux.c @@ -66,7 +66,7 @@ static int exynos5_mmc_config(int peripheral, int flags) struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); struct s5p_gpio_bank *bank, *bank_ext; - int i, start, gpio_func; + int i, start = 0, gpio_func = 0; switch (peripheral) { case PERIPH_ID_SDMMC0: |