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| author | Tom Warren <twarren@nvidia.com> | 2013-05-23 12:26:18 +0000 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2013-06-06 09:12:32 -0700 |
| commit | dbc000bfb51eb30d786521e6b8e29048c36cbefa (patch) | |
| tree | 854d088399fd10effedca4ad5c6c157324a2b721 /arch/arm | |
| parent | 4596dcc1d4ea5763e0f92cf5becd9fc7d4c6e674 (diff) | |
| download | u-boot-imx-dbc000bfb51eb30d786521e6b8e29048c36cbefa.zip u-boot-imx-dbc000bfb51eb30d786521e6b8e29048c36cbefa.tar.gz u-boot-imx-dbc000bfb51eb30d786521e6b8e29048c36cbefa.tar.bz2 | |
ARM: tegra: only enable SCU on Tegra20
The non-SPL build of U-Boot on Tegra only runs on a single CPU, and
hence there is no need to enable the SCU when running U-Boot. If an
SMP OS is booted, and it needs the SCU enabled, it will enable the SCU
itself. U-Boot doing so is redundant.
The one exception is Tegra20, where an enabled SCU is required for some
aspects of PCIe to work correctly.
Some Tegra SoCs contain CPUs without a software-controlled SCU. In this
case, attempting to turn it on actively causes problems. This is the case
for Tegra114. For example, when running Linux, the first (or at least
some very early) user-space process will trigger the following kernel
message:
Unhandled fault: imprecise external abort (0x406) at 0x00000000
This is typically accompanied by that process receving a fatal signal,
and exiting. Since this process is usually pid 1, this causes total
system boot failure.
Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, fleshed out description, ported to upstream chipid APIs]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/tegra-common/ap.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/cpu/tegra-common/ap.c b/arch/arm/cpu/tegra-common/ap.c index e099683..9e6d51d 100644 --- a/arch/arm/cpu/tegra-common/ap.c +++ b/arch/arm/cpu/tegra-common/ap.c @@ -109,6 +109,10 @@ static void enable_scu(void) struct scu_ctlr *scu = (struct scu_ctlr *)NV_PA_ARM_PERIPHBASE; u32 reg; + /* Only enable the SCU on T20/T25 */ + if (tegra_get_chip() != CHIPID_TEGRA20) + return; + /* If SCU already setup/enabled, return */ if (readl(&scu->scu_ctrl) & SCU_CTRL_ENABLE) return; |