diff options
author | York Sun <york.sun@nxp.com> | 2016-09-26 08:09:24 -0700 |
---|---|---|
committer | York Sun <york.sun@nxp.com> | 2016-09-26 08:53:07 -0700 |
commit | da28e58a7fc169625334b1e40f72067b481b352a (patch) | |
tree | fb6dd1f93c7596b930ed5c061b53b8fe3c4b2a11 /arch/arm | |
parent | 126fe70d7746d7e60a6331391cab6713368b78dc (diff) | |
download | u-boot-imx-da28e58a7fc169625334b1e40f72067b481b352a.zip u-boot-imx-da28e58a7fc169625334b1e40f72067b481b352a.tar.gz u-boot-imx-da28e58a7fc169625334b1e40f72067b481b352a.tar.bz2 |
armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option ARCH_LS1046A
Move this option to Kconfig and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
CC: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/Kconfig | 4 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/config.h | 3 |
6 files changed, 11 insertions, 4 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1560bcc..aed89c9 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -843,6 +843,7 @@ config TARGET_LS1043ARDB config TARGET_LS1046AQDS bool "Support ls1046aqds" + select ARCH_LS1046A select ARM64 select ARMV8_MULTIENTRY select SUPPORT_SPL @@ -855,6 +856,7 @@ config TARGET_LS1046AQDS config TARGET_LS1046ARDB bool "Support ls1046ardb" + select ARCH_LS1046A select ARM64 select ARMV8_MULTIENTRY select SUPPORT_SPL @@ -951,6 +953,8 @@ source "arch/arm/cpu/armv7/mx5/Kconfig" source "arch/arm/cpu/armv7/omap-common/Kconfig" +source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig" + source "arch/arm/mach-orion5x/Kconfig" source "arch/arm/mach-rmobile/Kconfig" diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig new file mode 100644 index 0000000..c234eff --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -0,0 +1,2 @@ +config ARCH_LS1046A + bool "Freescale Layerscape LS1046A SoC" diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile index 8c1317f..f9590af 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile +++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile @@ -34,6 +34,6 @@ ifneq ($(CONFIG_LS1012A),) obj-$(CONFIG_SYS_HAS_SERDES) += ls1012a_serdes.o endif -ifneq ($(CONFIG_LS1046A),) +ifneq ($(CONFIG_ARCH_LS1046A),) obj-$(CONFIG_SYS_HAS_SERDES) += ls1046a_serdes.o endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S index 6451a36..5d0b7a4 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S @@ -180,7 +180,7 @@ ENTRY(lowlevel_init) dsb sy #endif -#ifdef CONFIG_LS1046A +#ifdef CONFIG_ARCH_LS1046A /* Initialize the L2 RAM latency */ mrs x1, S3_1_c11_c0_2 mov x0, #0x1C7 diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 5ca721d..463d1e3 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -228,7 +228,7 @@ int sata_init(void) { struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA; -#ifdef CONFIG_LS1046A +#ifdef CONFIG_ARCH_LS1046A /* Disable SATA ECC */ out_le32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + 0x520, 0x80000000); #endif diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 81a5e7c..e7c7d98 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -7,6 +7,7 @@ #ifndef _ASM_ARMV8_FSL_LAYERSCAPE_CONFIG_H_ #define _ASM_ARMV8_FSL_LAYERSCAPE_CONFIG_H_ +#include <linux/kconfig.h> #include <fsl_ddrc_version.h> #define CONFIG_STANDALONE_LOAD_ADDR 0x80300000 @@ -213,7 +214,7 @@ #define GICD_BASE 0x01401000 #define GICC_BASE 0x01402000 -#elif defined(CONFIG_LS1046A) +#elif defined(CONFIG_ARCH_LS1046A) #define CONFIG_MAX_CPUS 4 #define CONFIG_SYS_FMAN_V3 #define CONFIG_SYS_NUM_FMAN 1 |