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authorSimon Glass <sjg@chromium.org>2014-05-20 06:01:32 -0600
committerMinkyu Kang <mk7.kang@samsung.com>2014-05-28 10:58:18 +0900
commit63e62674fbc37d354e53d77be7f2c1f30ba0b79d (patch)
treeb67e5d678b9f5935ab1f9be277d4066e21e45f58 /arch/arm
parent73e3bea9662a1433cec0627127700709d3f3aad2 (diff)
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exynos: dts: Correct EC interrupt GPIO
Now that the GPIO numbering series has been applied, we can use the correct GPIO for the EC interrupt. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/dts/exynos5250-snow.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/dts/exynos5250-snow.dts b/arch/arm/dts/exynos5250-snow.dts
index 9b48a0c..c584172 100644
--- a/arch/arm/dts/exynos5250-snow.dts
+++ b/arch/arm/dts/exynos5250-snow.dts
@@ -44,7 +44,7 @@
reg = <0x1e>;
compatible = "google,cros-ec";
i2c-max-frequency = <100000>;
- ec-interrupt = <&gpio 782 1>;
+ ec-interrupt = <&gpio 182 1>;
};
power-regulator@48 {
@@ -60,7 +60,7 @@
reg = <0>;
compatible = "google,cros-ec";
spi-max-frequency = <5000000>;
- ec-interrupt = <&gpio 782 1>;
+ ec-interrupt = <&gpio 182 1>;
optimise-flash-write;
status = "disabled";
};