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authorYe Li <ye.li@nxp.com>2017-03-16 11:25:35 +0800
committerYe Li <ye.li@nxp.com>2017-04-05 17:24:33 +0800
commit41895cd598be6c4a64fc4fec521120e4962abc28 (patch)
tree53232007f8de5e6cffe40188774c7305c231b7dc /arch/arm
parenta4d958d120d29f6f79e9023715a42bac582f4c76 (diff)
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MLK-14445-2 mx7ulp_evk: Add QSPI flash support
Porting the QSPI flash board support from v2016.03, and convert to use DM QSPI driver. Since we need to support QSPI at default in u-boot, change the default DTS file to qspi enabled DTS. Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/dts/Makefile3
-rw-r--r--arch/arm/dts/imx7ulp-evk-qspi.dts46
-rw-r--r--arch/arm/dts/imx7ulp.dtsi1
3 files changed, 49 insertions, 1 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1b8b327..3569078 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -375,7 +375,8 @@ dtb-$(CONFIG_MX7) += imx7-colibri.dtb \
imx7d-19x19-lpddr2-arm2.dtb \
imx7d-19x19-lpddr3-arm2.dtb
-dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
+dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb \
+ imx7ulp-evk-qspi.dtb
dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \
keystone-k2l-evm.dtb \
diff --git a/arch/arm/dts/imx7ulp-evk-qspi.dts b/arch/arm/dts/imx7ulp-evk-qspi.dts
new file mode 100644
index 0000000..450ea0e
--- /dev/null
+++ b/arch/arm/dts/imx7ulp-evk-qspi.dts
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "imx7ulp-evk.dts"
+
+&qspi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_qspi1_1>;
+ status = "okay";
+
+ flash0: mx25r6435f@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "macronix,mx25r6435f";
+ spi-max-frequency = <29000000>;
+ };
+};
+
+&iomuxc {
+ status = "okay";
+};
+
+&iomuxc {
+ imx7ulp-evk {
+ pinctrl_qspi1_1: qspi1grp_1 {
+ fsl,pins = <
+ ULP1_PAD_PTB7_LLWU0_P11__QSPIA_SS1_B 0x43 /* SS1 */
+ ULP1_PAD_PTB8__QSPIA_SS0_B 0x43 /* SS0 */
+ ULP1_PAD_PTB15__QSPIA_SCLK 0x43 /* SCLK */
+ ULP1_PAD_PTB9_LLWU0_P12__QSPIA_DQS 0x43 /* DQS */
+ ULP1_PAD_PTB16_LLWU0_P14__QSPIA_DATA3 0x43 /* D3 */
+ ULP1_PAD_PTB17__QSPIA_DATA2 0x43 /* D2 */
+ ULP1_PAD_PTB18__QSPIA_DATA1 0x43 /* D1 */
+ ULP1_PAD_PTB19_LLWU0_P15__QSPIA_DATA0 0x43 /* D0 */
+ >;
+ };
+ };
+};
+
diff --git a/arch/arm/dts/imx7ulp.dtsi b/arch/arm/dts/imx7ulp.dtsi
index 5497734..37f1308 100644
--- a/arch/arm/dts/imx7ulp.dtsi
+++ b/arch/arm/dts/imx7ulp.dtsi
@@ -31,6 +31,7 @@
i2c1 = &lpi2c5;
i2c2 = &lpi2c6;
i2c3 = &lpi2c7;
+ spi0 = &qspi1;
};
cpus {