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authorBo Shen <voice.shen@atmel.com>2014-03-19 14:48:44 +0800
committerAndreas Bießmann <andreas.devel@googlemail.com>2014-05-27 00:10:40 +0200
commit12bbc0ba813463fd3c7b433c37abcd3f67b37ff3 (patch)
tree52e65f5a83053296b9f3e75c41f4b5f41dfc4f38 /arch/arm
parent49692c5f517d8e44ed9db0de778728fe7d2a300c (diff)
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ARM: atmel: switch to main crystal osc for SPL boot
If without switch to main crystal oscillator, the sama5d3 SoC will use internal on chip RC oscillator. In order to get better accuracy, switch to main crystal oscillator. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/at91-common/spl.c39
-rw-r--r--arch/arm/include/asm/arch-at91/at91_pmc.h4
2 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/cpu/at91-common/spl.c b/arch/arm/cpu/at91-common/spl.c
index 7f4debb..cbb5a52 100644
--- a/arch/arm/cpu/at91-common/spl.c
+++ b/arch/arm/cpu/at91-common/spl.c
@@ -20,6 +20,43 @@ static void at91_disable_wdt(void)
writel(AT91_WDT_MR_WDDIS, &wdt->mr);
}
+static void switch_to_main_crystal_osc(void)
+{
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+ u32 tmp;
+
+ tmp = readl(&pmc->mor);
+ tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff);
+ tmp &= ~AT91_PMC_MOR_KEY(0xff);
+ tmp |= AT91_PMC_MOR_MOSCEN;
+ tmp |= AT91_PMC_MOR_OSCOUNT(8);
+ tmp |= AT91_PMC_MOR_KEY(0x37);
+ writel(tmp, &pmc->mor);
+ while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS))
+ ;
+
+ tmp = readl(&pmc->mor);
+ tmp &= ~AT91_PMC_MOR_OSCBYPASS;
+ tmp &= ~AT91_PMC_MOR_KEY(0xff);
+ tmp |= AT91_PMC_MOR_KEY(0x37);
+ writel(tmp, &pmc->mor);
+
+ tmp = readl(&pmc->mor);
+ tmp |= AT91_PMC_MOR_MOSCSEL;
+ tmp &= ~AT91_PMC_MOR_KEY(0xff);
+ tmp |= AT91_PMC_MOR_KEY(0x37);
+ writel(tmp, &pmc->mor);
+
+ while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS))
+ ;
+
+ tmp = readl(&pmc->mor);
+ tmp &= ~AT91_PMC_MOR_MOSCRCEN;
+ tmp &= ~AT91_PMC_MOR_KEY(0xff);
+ tmp |= AT91_PMC_MOR_KEY(0x37);
+ writel(tmp, &pmc->mor);
+}
+
void at91_plla_init(u32 pllar)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
@@ -76,6 +113,8 @@ u32 spl_boot_mode(void)
void s_init(void)
{
+ switch_to_main_crystal_osc();
+
/* disable watchdog */
at91_disable_wdt();
diff --git a/arch/arm/include/asm/arch-at91/at91_pmc.h b/arch/arm/include/asm/arch-at91/at91_pmc.h
index 4535608..04f6239 100644
--- a/arch/arm/include/asm/arch-at91/at91_pmc.h
+++ b/arch/arm/include/asm/arch-at91/at91_pmc.h
@@ -70,7 +70,10 @@ typedef struct at91_pmc {
#define AT91_PMC_MOR_MOSCEN 0x01
#define AT91_PMC_MOR_OSCBYPASS 0x02
+#define AT91_PMC_MOR_MOSCRCEN 0x08
#define AT91_PMC_MOR_OSCOUNT(x) ((x & 0xff) << 8)
+#define AT91_PMC_MOR_KEY(x) ((x & 0xff) << 16)
+#define AT91_PMC_MOR_MOSCSEL (1 << 24)
#define AT91_PMC_PLLXR_DIV(x) (x & 0xFF)
#define AT91_PMC_PLLXR_PLLCOUNT(x) ((x & 0x3F) << 8)
@@ -142,6 +145,7 @@ typedef struct at91_pmc {
#define AT91_PMC_IXR_PCKRDY1 0x00000200
#define AT91_PMC_IXR_PCKRDY2 0x00000400
#define AT91_PMC_IXR_PCKRDY3 0x00000800
+#define AT91_PMC_IXR_MOSCSELS 0x00010000
#define AT91_PMC_PCK (1 << 0) /* Processor Clock */
#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */