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author | Tom Rini <trini@konsulko.com> | 2016-06-20 05:14:01 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2016-06-20 05:14:01 -0400 |
commit | 09849f4a7779a247be8af5cfae44f7aad30e1222 (patch) | |
tree | 50891a9305714eff354702443555f52f1a65463c /arch/arm | |
parent | 7c8ef0feb97586d35b0296b48903daef8c06ab21 (diff) | |
parent | 135aa95002646c46e89de93fa36adad1b010548f (diff) | |
download | u-boot-imx-09849f4a7779a247be8af5cfae44f7aad30e1222.zip u-boot-imx-09849f4a7779a247be8af5cfae44f7aad30e1222.tar.gz u-boot-imx-09849f4a7779a247be8af5cfae44f7aad30e1222.tar.bz2 |
Merge git://git.denx.de/u-boot-dm
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/dts/tegra186.dtsi | 13 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-rockchip/clock.h | 12 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/board.c | 39 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 15 | ||||
-rw-r--r-- | arch/arm/mach-snapdragon/clock-apq8016.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-tegra/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/mach-zynq/clk.c | 1 |
7 files changed, 64 insertions, 28 deletions
diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi index 18b6a26..fce34fa6 100644 --- a/arch/arm/dts/tegra186.dtsi +++ b/arch/arm/dts/tegra186.dtsi @@ -1,6 +1,7 @@ #include "skeleton.dtsi" #include <dt-bindings/gpio/tegra-gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/mailbox/tegra-hsp.h> / { compatible = "nvidia,tegra186"; @@ -40,6 +41,18 @@ status = "disabled"; }; + hsp: hsp@3c00000 { + compatible = "nvidia,tegra186-hsp"; + reg = <0x0 0x03c00000 0x0 0xa0000>; + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; + nvidia,num-SM = <0x8>; + nvidia,num-AS = <0x2>; + nvidia,num-SS = <0x2>; + nvidia,num-DB = <0x7>; + nvidia,num-SI = <0x8>; + #mbox-cells = <1>; + }; + gpio@c2f0000 { compatible = "nvidia,tegra186-gpio-aon"; reg-names = "security", "gpio"; diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h index d66b26f..317e512 100644 --- a/arch/arm/include/asm/arch-rockchip/clock.h +++ b/arch/arm/include/asm/arch-rockchip/clock.h @@ -62,18 +62,6 @@ static inline u32 clk_get_divisor(ulong input_rate, uint output_rate) */ void *rockchip_get_cru(void); -/** - * rkclk_get_clk() - get a pointer to a given clock - * - * This is an internal function - use outside the clock subsystem indicates - * that work is needed! - * - * @clk_id: Clock requested - * @devp: Returns a pointer to that clock - * @return 0 if OK, -ve on error - */ -int rkclk_get_clk(enum rk_clk_id clk_id, struct udevice **devp); - struct rk3288_cru; struct rk3288_grf; diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index 133d663..816540e 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -9,6 +9,7 @@ #include <dm.h> #include <ram.h> #include <asm/io.h> +#include <asm/arch/clock.h> DECLARE_GLOBAL_DATA_PTR; @@ -54,15 +55,43 @@ void lowlevel_init(void) static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { + static const struct { + char *name; + int id; + } clks[] = { + { "osc", CLK_OSC }, + { "apll", CLK_ARM }, + { "dpll", CLK_DDR }, + { "cpll", CLK_CODEC }, + { "gpll", CLK_GENERAL }, +#ifdef CONFIG_ROCKCHIP_RK3036 + { "mpll", CLK_NEW }, +#else + { "npll", CLK_NEW }, +#endif + }; + int ret, i; struct udevice *dev; - for (uclass_first_device(UCLASS_CLK, &dev); - dev; - uclass_next_device(&dev)) { + ret = uclass_get_device(UCLASS_CLK, 0, &dev); + if (ret) { + printf("clk-uclass not found\n"); + return 0; + } + + for (i = 0; i < ARRAY_SIZE(clks); i++) { + struct clk clk; ulong rate; - rate = clk_get_rate(dev); - printf("%s: %lu\n", dev->name, rate); + clk.id = clks[i].id; + ret = clk_request(dev, &clk); + if (ret < 0) + continue; + + rate = clk_get_rate(&clk); + printf("%s: %lu\n", clks[i].name, rate); + + clk_free(&clk); } return 0; diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c index 2e21282..55ac73e 100644 --- a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c @@ -36,7 +36,7 @@ struct chan_info { struct dram_info { struct chan_info chan[2]; struct ram_info info; - struct udevice *ddr_clk; + struct clk ddr_clk; struct rk3288_cru *cru; struct rk3288_grf *grf; struct rk3288_sgrf *sgrf; @@ -576,7 +576,7 @@ static void dram_all_config(const struct dram_info *dram, rk_clrsetreg(&dram->sgrf->soc_con2, 0x1f, sdram_params->base.stride); } -static int sdram_init(const struct dram_info *dram, +static int sdram_init(struct dram_info *dram, const struct rk3288_sdram_params *sdram_params) { int channel; @@ -592,8 +592,8 @@ static int sdram_init(const struct dram_info *dram, return -E2BIG; } - debug("ddr clk %s\n", dram->ddr_clk->name); - ret = clk_set_rate(dram->ddr_clk, sdram_params->base.ddr_freq); + debug("ddr clk dpll\n"); + ret = clk_set_rate(&dram->ddr_clk, sdram_params->base.ddr_freq); debug("ret=%d\n", ret); if (ret) { debug("Could not set DDR clock\n"); @@ -836,6 +836,7 @@ static int rk3288_dmc_probe(struct udevice *dev) struct dram_info *priv = dev_get_priv(dev); struct regmap *map; int ret; + struct udevice *dev_clk; map = syscon_get_regmap_by_driver_data(ROCKCHIP_SYSCON_NOC); if (IS_ERR(map)) @@ -856,7 +857,11 @@ static int rk3288_dmc_probe(struct udevice *dev) priv->chan[1].pctl = regmap_get_range(map, 2); priv->chan[1].publ = regmap_get_range(map, 3); - ret = uclass_get_device(UCLASS_CLK, CLK_DDR, &priv->ddr_clk); + ret = uclass_get_device(UCLASS_CLK, 0, &dev_clk); + if (ret) + return ret; + priv->ddr_clk.id = CLK_DDR; + ret = clk_request(dev_clk, &priv->ddr_clk); if (ret) return ret; diff --git a/arch/arm/mach-snapdragon/clock-apq8016.c b/arch/arm/mach-snapdragon/clock-apq8016.c index d548d75..c2cf924 100644 --- a/arch/arm/mach-snapdragon/clock-apq8016.c +++ b/arch/arm/mach-snapdragon/clock-apq8016.c @@ -9,7 +9,7 @@ */ #include <common.h> -#include <clk.h> +#include <clk-uclass.h> #include <dm.h> #include <errno.h> #include <asm/io.h> @@ -212,11 +212,11 @@ static int clk_init_uart(struct msm_clk_priv *priv) return 0; } -ulong msm_set_periph_rate(struct udevice *dev, int periph, ulong rate) +ulong msm_set_rate(struct clk *clk, ulong rate) { - struct msm_clk_priv *priv = dev_get_priv(dev); + struct msm_clk_priv *priv = dev_get_priv(clk->dev); - switch (periph) { + switch (clk->id) { case 0: /* SDC1 */ return clk_init_sdc(priv, 0, rate); break; @@ -243,7 +243,7 @@ static int msm_clk_probe(struct udevice *dev) } static struct clk_ops msm_clk_ops = { - .set_periph_rate = msm_set_periph_rate, + .set_rate = msm_set_rate, }; static const struct udevice_id msm_clk_ids[] = { diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index b18a12e..f4affa5 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -56,8 +56,10 @@ config TEGRA210 config TEGRA186 bool "Tegra186 family" + select DM_MAILBOX select TEGRA186_GPIO select TEGRA_ARMV8_COMMON + select TEGRA_HSP endchoice diff --git a/arch/arm/mach-zynq/clk.c b/arch/arm/mach-zynq/clk.c index 6444be8..40383c1 100644 --- a/arch/arm/mach-zynq/clk.c +++ b/arch/arm/mach-zynq/clk.c @@ -6,7 +6,6 @@ */ #include <common.h> #include <errno.h> -#include <clk.h> #include <asm/io.h> #include <asm/arch/hardware.h> #include <asm/arch/clk.h> |