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| author | Peng Fan <peng.fan@nxp.com> | 2016-10-20 14:42:53 +0800 |
|---|---|---|
| committer | Peng Fan <peng.fan@nxp.com> | 2016-10-21 13:39:18 +0800 |
| commit | a3e5ebaa772e7ab1fe54615a47656b796cf5723e (patch) | |
| tree | c22ba6b0312c2a037c91c7ef37ea6085472aa835 /arch/arm | |
| parent | 74054cc9eb8077b375f41235b081f1a1596fa4a6 (diff) | |
| download | u-boot-imx-a3e5ebaa772e7ab1fe54615a47656b796cf5723e.zip u-boot-imx-a3e5ebaa772e7ab1fe54615a47656b796cf5723e.tar.gz u-boot-imx-a3e5ebaa772e7ab1fe54615a47656b796cf5723e.tar.bz2 | |
MLK-13373 mx6sll: update ddr script to 2.1.1
Update ddr script to 2.1.1
Script:
http://compass.freescale.net/livelink/livelink/235732623/EVK_IMX6SLL_LPDDR3_400MHz_512MB_32bit_V2.1.1.txt?func=doc.Fetch&nodeid=235732623
Version 2.1.1:
-Update [MMDC_MPRDDLCTL] and [MMDC_MPWRDLCTL] based on calibration results
-setmem /32 0x021B0848 = 0x3F393B3C // [MMDC_MPRDDLCTL] MMDC PHY Read delay-lines Configuration Register
-setmem /32 0x021B0850 = 0x262C3826 // [MMDC_MPWRDLCTL] MMDC PHY Write delay-lines Configuration Register
Tested on two boards.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm')
0 files changed, 0 insertions, 0 deletions