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| author | Ye.Li <ye.li@nxp.com> | 2016-07-15 10:02:08 +0800 |
|---|---|---|
| committer | Ye.Li <ye.li@nxp.com> | 2016-07-15 10:04:04 +0800 |
| commit | 747e9c9980375ce79e2917ed39bbe159e88e10ca (patch) | |
| tree | 50e9d9507df51d972972c33b4d62d9f16e98d047 /arch/arm | |
| parent | 9c2069ad87a068ba9bfde13a1a4026702edbe11a (diff) | |
| download | u-boot-imx-747e9c9980375ce79e2917ed39bbe159e88e10ca.zip u-boot-imx-747e9c9980375ce79e2917ed39bbe159e88e10ca.tar.gz u-boot-imx-747e9c9980375ce79e2917ed39bbe159e88e10ca.tar.bz2 | |
MLK-12985 imx: mx6sx: Disable ENET clock before switching clock parent
Need to gate ENET clock when switching to a new clock parent, because
the mux is not glitchless.
Signed-off-by: Ye.Li <ye.li@nxp.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index 03d58fa..c289a14 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -974,6 +974,11 @@ int enable_fec_anatop_clock(int fec_id, enum enet_freq freq) writel(reg, &anatop->pll_enet); #ifdef CONFIG_MX6SX + /* Disable enet system clcok before switching clock parent */ + reg = readl(&imx_ccm->CCGR3); + reg &= ~MXC_CCM_CCGR3_ENET_MASK; + writel(reg, &imx_ccm->CCGR3); + /* * Set enet ahb clock to 200MHz * pll2_pfd2_396m-> ENET_PODF-> ENET_AHB |