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authorWolfgang Denk <wd@denx.de>2010-11-13 00:19:55 +0100
committerWolfgang Denk <wd@denx.de>2010-11-13 00:19:55 +0100
commit227b72515546fca535dbd3274f6d875d97f494fe (patch)
tree3713c814a7453024eceb097c67532072950e2f2e /arch/arm
parent34998cac2e6231e04d9c31357dc68047635a44ea (diff)
parent0fc43a417c4ba5ab63dad6736a18f3bf7008f35f (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-ti
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/armv7/omap3/sdrc.c7
-rw-r--r--arch/arm/lib/cache.c2
2 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index c75aa1d..a4979ce 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -149,6 +149,13 @@ void do_sdrc_init(u32 cs, u32 early)
&sdrc_actim_base1->ctrla);
writel(readl(&sdrc_actim_base0->ctrlb),
&sdrc_actim_base1->ctrlb);
+
+ writel(CMD_NOP, &sdrc_base->cs[cs].manual);
+ writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+ writel(readl(&sdrc_base->cs[CS0].mr),
+ &sdrc_base->cs[CS1].mr);
}
/*
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 5715168..30686fe 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -38,7 +38,7 @@ void flush_cache (unsigned long dummy1, unsigned long dummy2)
/* disable write buffer as well (page 2-22) */
asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
#endif
-#ifdef CONFIG_ARMV7
+#ifdef CONFIG_OMAP34XX
void v7_flush_cache_all(void);
v7_flush_cache_all();