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author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-02-27 02:27:05 +0900 |
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committer | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-03-01 00:03:18 +0900 |
commit | b76fa3a34ba8d64e75781c2d177a9a631d06d214 (patch) | |
tree | ddb3fc75dba0f28f5960e068776754767049fd6e /arch/arm | |
parent | 6cc2120646a3230bcf4b57cb3cb937f4a1cfe150 (diff) | |
download | u-boot-imx-b76fa3a34ba8d64e75781c2d177a9a631d06d214.zip u-boot-imx-b76fa3a34ba8d64e75781c2d177a9a631d06d214.tar.gz u-boot-imx-b76fa3a34ba8d64e75781c2d177a9a631d06d214.tar.bz2 |
ARM: UniPhier: remove stop_mpll() from PH1-Pro4 PLL initialization
This function was intended for MN2WS0235 (what we call PH1-Pro4TV).
On that SoC, MPLL is already running on the power-on reset and it
makes sense to stop the PLL at early boot-up.
On the other hand, PH1-Pro4(R) does not have SC_MPLLOSCCTL register,
so this function has no point.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-uniphier/include/mach/sc-regs.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-uniphier/ph1-pro4/pll_init.c | 17 |
2 files changed, 0 insertions, 21 deletions
diff --git a/arch/arm/mach-uniphier/include/mach/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h index caec6c2..20878e2 100644 --- a/arch/arm/mach-uniphier/include/mach/sc-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sc-regs.h @@ -11,10 +11,6 @@ #define SC_BASE_ADDR 0x61840000 -#define SC_MPLLOSCCTL (SC_BASE_ADDR | 0x1184) -#define SC_MPLLOSCCTL_MPLLEN (0x1 << 0) -#define SC_MPLLOSCCTL_MPLLST (0x1 << 1) - #define SC_DPLLCTRL (SC_BASE_ADDR | 0x1200) #define SC_DPLLCTRL_SSC_EN (0x1 << 31) #define SC_DPLLCTRL_FOUTMODE_MASK (0xf << 16) diff --git a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c index 3d29548..2a965a5 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c @@ -46,22 +46,6 @@ static void dpll_init(void) writel(tmp, SC_DPLLCTRL2); } -static void stop_mpll(void) -{ - u32 tmp; - - tmp = readl(SC_MPLLOSCCTL); - - if (!(tmp & SC_MPLLOSCCTL_MPLLST)) - return; /* already stopped */ - - tmp &= ~SC_MPLLOSCCTL_MPLLEN; - writel(tmp, SC_MPLLOSCCTL); - - while (readl(SC_MPLLOSCCTL) & SC_MPLLOSCCTL_MPLLST) - ; -} - static void vpll_init(void) { u32 tmp, clk_mode_axosel; @@ -157,7 +141,6 @@ static void vpll_init(void) void pll_init(void) { dpll_init(); - stop_mpll(); vpll_init(); /* |