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authorChristian Riesch <christian.riesch@omicron.at>2011-11-30 22:27:37 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-12-06 23:59:33 +0100
commit8f1da53508c78789ebeea98a92a3f55c3f84dc5d (patch)
treedd3dc4dbbbeb08b8c81a4d7ea70e74f73b864386 /arch/arm
parentef426d45cc94678eab90ebaf1b62fe0f4f0e4691 (diff)
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arm, arm926ejs: Fix clear bss loop for zero length bss
This patch fixes the clear bss loop for bss sections that have zero length, i.e., where __bss_start == __bss_end__. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/arm926ejs/start.S8
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 339c5ed..bb4d00b 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -301,10 +301,12 @@ clear_bss:
#endif
mov r2, #0x00000000 /* clear */
-clbss_l:str r2, [r0] /* clear loop... */
+clbss_l:cmp r0, r1 /* clear loop... */
+ bhs clbss_e /* if reached end of bss, exit */
+ str r2, [r0]
add r0, r0, #4
- cmp r0, r1
- bne clbss_l
+ b clbss_l
+clbss_e:
#ifndef CONFIG_SPL_BUILD
bl coloured_LED_init