update arm/at91rm9200 work with rework rework110202

* convert at91rm9200ek and eb_cpux9k2 board to ATMEL_xxx name scheme
 * Fix: timer.c compile error io.h not found with arm/at91rm9200
 * update arm920t/at91 to ATMEL_xxx name scheme
 * update arm920t/at91 soc lib
 * update at91_emac driver

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Tested-by: Andreas Bießmann <andreas.devel@gmail.com>

5 files changed, 128 insertions, 117 deletions

diff --git a/arch/arm/cpu/arm920t/at91/reset.c b/arch/arm/cpu/arm920t/at91/reset.c
index 51043ec..4fa0f98 100644
--- a/arch/arm/cpu/arm920t/at91/reset.c
+++ b/arch/arm/cpu/arm920t/at91/reset.c
@@ -42,7 +42,7 @@ void  __attribute__((weak)) board_reset(void)
 
 void reset_cpu(ulong ignored)
 {
-	at91_st_t *st = (at91_st_t *) AT91_ST_BASE;
+	at91_st_t *st = (at91_st_t *) ATMEL_BASE_ST;
 #if defined(CONFIG_AT91RM9200_USART)
 	/*shutdown the console to avoid strange chars during reset */
 	serial_exit();
diff --git a/arch/arm/cpu/arm920t/at91/timer.c b/arch/arm/cpu/arm920t/at91/timer.c
index d9a024f..f0ad7d6 100644
--- a/arch/arm/cpu/arm920t/at91/timer.c
+++ b/arch/arm/cpu/arm920t/at91/timer.c
@@ -32,7 +32,7 @@
 
 #include <common.h>
 
-#include <asm/arch/io.h>
+#include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_tc.h>
 #include <asm/arch/at91_pmc.h>
@@ -44,11 +44,11 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int timer_init(void)
 {
-	at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
-	at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+	at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
+	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	/* enables TC1.0 clock */
-	writel(1 << AT91_ID_TC0, &pmc->pcer);	/* enable clock */
+	writel(1 << ATMEL_ID_TC0, &pmc->pcer);	/* enable clock */
 
 	writel(0, &tc->bcr);
 	writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE |
@@ -96,14 +96,14 @@ void __udelay(unsigned long usec)
 void reset_timer_masked(void)
 {
 	/* reset time */
-	at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
+	at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
 	gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff;
 	gd->tbl = 0;
 }
 
 ulong get_timer_raw(void)
 {
-	at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
+	at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
 	u32 now;
 
 	now = readl(&tc->tc[0].cv) & 0x0000ffff;
diff --git a/arch/arm/include/asm/arch-at91/at91_mc.h b/arch/arm/include/asm/arch-at91/at91_mc.h
index 09453a9..e00cb68 100644
--- a/arch/arm/include/asm/arch-at91/at91_mc.h
+++ b/arch/arm/include/asm/arch-at91/at91_mc.h
@@ -23,12 +23,12 @@
 #ifndef AT91_MC_H
 #define AT91_MC_H
 
-#define AT91_ASM_MC_EBI_CSA	(AT91_MC_BASE + 0x60)
-#define AT91_ASM_MC_EBI_CFG	(AT91_MC_BASE + 0x64)
-#define AT91_ASM_MC_SMC_CSR0	(AT91_MC_BASE + 0x70)
-#define AT91_ASM_MC_SDRAMC_MR	(AT91_MC_BASE + 0x90)
-#define AT91_ASM_MC_SDRAMC_TR	(AT91_MC_BASE + 0x94)
-#define AT91_ASM_MC_SDRAMC_CR	(AT91_MC_BASE + 0x98)
+#define AT91_ASM_MC_EBI_CSA	(ATMEL_BASE_MC + 0x60)
+#define AT91_ASM_MC_EBI_CFG	(ATMEL_BASE_MC + 0x64)
+#define AT91_ASM_MC_SMC_CSR0	(ATMEL_BASE_MC + 0x70)
+#define AT91_ASM_MC_SDRAMC_MR	(ATMEL_BASE_MC + 0x90)
+#define AT91_ASM_MC_SDRAMC_TR	(ATMEL_BASE_MC + 0x94)
+#define AT91_ASM_MC_SDRAMC_CR	(ATMEL_BASE_MC + 0x98)
 
 #ifndef __ASSEMBLY__
 
diff --git a/arch/arm/include/asm/arch-at91/at91_pmc.h b/arch/arm/include/asm/arch-at91/at91_pmc.h
index fb8bb17..086cb9b 100644
--- a/arch/arm/include/asm/arch-at91/at91_pmc.h
+++ b/arch/arm/include/asm/arch-at91/at91_pmc.h
@@ -17,11 +17,11 @@
 #ifndef AT91_PMC_H
 #define AT91_PMC_H
 
-#define	AT91_ASM_PMC_MOR	(AT91_PMC_BASE + 0x20)
-#define	AT91_ASM_PMC_PLLAR	(AT91_PMC_BASE + 0x28)
-#define	AT91_ASM_PMC_PLLBR	(AT91_PMC_BASE + 0x2c)
-#define AT91_ASM_PMC_MCKR	(AT91_PMC_BASE + 0x30)
-#define AT91_ASM_PMC_SR		(AT91_PMC_BASE + 0x68)
+#define	AT91_ASM_PMC_MOR	(ATMEL_BASE_PMC + 0x20)
+#define	AT91_ASM_PMC_PLLAR	(ATMEL_BASE_PMC + 0x28)
+#define	AT91_ASM_PMC_PLLBR	(ATMEL_BASE_PMC + 0x2c)
+#define AT91_ASM_PMC_MCKR	(ATMEL_BASE_PMC + 0x30)
+#define AT91_ASM_PMC_SR		(ATMEL_BASE_PMC + 0x68)
 
 #ifndef __ASSEMBLY__
 
diff --git a/arch/arm/include/asm/arch-at91/at91rm9200.h b/arch/arm/include/asm/arch-at91/at91rm9200.h
index 1bee6f2..ff18014 100644
--- a/arch/arm/include/asm/arch-at91/at91rm9200.h
+++ b/arch/arm/include/asm/arch-at91/at91rm9200.h
@@ -21,115 +21,126 @@
 #ifndef __AT91RM9200_H__
 #define __AT91RM9200_H__
 
+#define CONFIG_AT91FAMILY	/* it's a member of AT91 */
+#define CONFIG_ARM920T		/* This is an ARM920T Core	*/
+
 /* Periperial Identifiers */
 
-#define AT91_ID_SYS	1	/* System Peripheral */
-#define AT91_ID_PIOA	2	/* PIO port A */
-#define AT91_ID_PIOB	3	/* PIO port B */
-#define AT91_ID_PIOC	4	/* PIO port C */
-#define AT91_ID_PIOD	5	/* PIO port D BGA only */
-#define AT91_ID_USART0	6	/* USART 0 */
-#define AT91_ID_USART1	7	/* USART 1 */
-#define AT91_ID_USART2	8	/* USART 2 */
-#define AT91_ID_USART3	9	/* USART 3 */
-#define AT91_ID_MCI	10	/* Multimedia Card Interface */
-#define AT91_ID_UDP	11	/* USB Device Port */
-#define AT91_ID_TWI	12	/* Two Wire Interface */
-#define AT91_ID_SPI	13	/* Serial Peripheral Interface */
-#define AT91_ID_SSC0	14	/* Synch. Serial Controller 0 */
-#define AT91_ID_SSC1	15	/* Synch. Serial Controller 1 */
-#define AT91_ID_SSC2	16	/* Synch. Serial Controller 2 */
-#define AT91_ID_TC0	17	/* Timer Counter 0 */
-#define AT91_ID_TC1	18	/* Timer Counter 1 */
-#define AT91_ID_TC2	19	/* Timer Counter 2 */
-#define AT91_ID_TC3	20	/* Timer Counter 3 */
-#define AT91_ID_TC4	21	/* Timer Counter 4 */
-#define AT91_ID_TC5	22	/* Timer Counter 5 */
-#define AT91_ID_UHP	23	/* OHCI USB Host Port */
-#define AT91_ID_EMAC	24	/* Ethernet MAC */
-#define AT91_ID_IRQ0	25	/* Advanced Interrupt Controller */
-#define AT91_ID_IRQ1	26	/* Advanced Interrupt Controller */
-#define AT91_ID_IRQ2	27	/* Advanced Interrupt Controller */
-#define AT91_ID_IRQ3	28	/* Advanced Interrupt Controller */
-#define AT91_ID_IRQ4	29	/* Advanced Interrupt Controller */
-#define AT91_ID_IRQ5	30	/* Advanced Interrupt Controller */
-#define AT91_ID_IRQ6	31	/* Advanced Interrupt Controller */
-
-#define AT91_USB_HOST_BASE	0x00300000
-
-#define AT91_TC_BASE		0xFFFA0000
-#define AT91_UDP_BASE		0xFFFB0000
-#define AT91_MCI_BASE		0xFFFB4000
-#define AT91_TWI_BASE		0xFFFB8000
-#define AT91_EMAC_BASE		0xFFFBC000
-#define AT91_USART_BASE		0xFFFC0000	/* 4x 0x4000 Offset */
-#define AT91_SCC_BASE		0xFFFD0000	/* 4x 0x4000 Offset */
-#define AT91_SPI_BASE		0xFFFE0000
-
-#define AT91_AIC_BASE		0xFFFFF000
-#define AT91_DBGU_BASE		0xFFFFF200
-#define AT91_PIO_BASE		0xFFFFF400	/* 4x 0x200 Offset */
-#define AT91_PMC_BASE		0xFFFFFC00
-#define AT91_ST_BASE		0xFFFFFD00
-#define AT91_ST_BASE		0xFFFFFD00
-#define AT91_RTC_BASE		0xFFFFFE00
-#define AT91_MC_BASE		0xFFFFFF00
+#define ATMEL_ID_SYS	1	/* System Peripheral */
+#define ATMEL_ID_PIOA	2	/* PIO port A */
+#define ATMEL_ID_PIOB	3	/* PIO port B */
+#define ATMEL_ID_PIOC	4	/* PIO port C */
+#define ATMEL_ID_PIOD	5	/* PIO port D BGA only */
+#define ATMEL_ID_USART0	6	/* USART 0 */
+#define ATMEL_ID_USART1	7	/* USART 1 */
+#define ATMEL_ID_USART2	8	/* USART 2 */
+#define ATMEL_ID_USART3	9	/* USART 3 */
+#define ATMEL_ID_MCI	10	/* Multimedia Card Interface */
+#define ATMEL_ID_UDP	11	/* USB Device Port */
+#define ATMEL_ID_TWI	12	/* Two Wire Interface */
+#define ATMEL_ID_SPI	13	/* Serial Peripheral Interface */
+#define ATMEL_ID_SSC0	14	/* Synch. Serial Controller 0 */
+#define ATMEL_ID_SSC1	15	/* Synch. Serial Controller 1 */
+#define ATMEL_ID_SSC2	16	/* Synch. Serial Controller 2 */
+#define ATMEL_ID_TC0	17	/* Timer Counter 0 */
+#define ATMEL_ID_TC1	18	/* Timer Counter 1 */
+#define ATMEL_ID_TC2	19	/* Timer Counter 2 */
+#define ATMEL_ID_TC3	20	/* Timer Counter 3 */
+#define ATMEL_ID_TC4	21	/* Timer Counter 4 */
+#define ATMEL_ID_TC5	22	/* Timer Counter 5 */
+#define ATMEL_ID_UHP	23	/* OHCI USB Host Port */
+#define ATMEL_ID_EMAC	24	/* Ethernet MAC */
+#define ATMEL_ID_IRQ0	25	/* Advanced Interrupt Controller */
+#define ATMEL_ID_IRQ1	26	/* Advanced Interrupt Controller */
+#define ATMEL_ID_IRQ2	27	/* Advanced Interrupt Controller */
+#define ATMEL_ID_IRQ3	28	/* Advanced Interrupt Controller */
+#define ATMEL_ID_IRQ4	29	/* Advanced Interrupt Controller */
+#define ATMEL_ID_IRQ5	30	/* Advanced Interrupt Controller */
+#define ATMEL_ID_IRQ6	31	/* Advanced Interrupt Controller */
+
+#define ATMEL_USB_HOST_BASE	0x00300000
+
+#define ATMEL_BASE_TC		0xFFFA0000
+#define ATMEL_BASE_UDP		0xFFFB0000
+#define ATMEL_BASE_MCI		0xFFFB4000
+#define ATMEL_BASE_TWI		0xFFFB8000
+#define ATMEL_BASE_EMAC		0xFFFBC000
+#define ATMEL_BASE_USART	0xFFFC0000	/* 4x 0x4000 Offset */
+#define ATMEL_BASE_USART0	ATMEL_BASE_USART
+#define ATMEL_BASE_USART1	(ATMEL_BASE_USART + 0x4000)
+#define ATMEL_BASE_USART2	(ATMEL_BASE_USART + 0x8000)
+#define ATMEL_BASE_USART3	(ATMEL_BASE_USART + 0xC000)
+
+#define ATMEL_BASE_SCC		0xFFFD0000	/* 4x 0x4000 Offset */
+#define ATMEL_BASE_SPI		0xFFFE0000
+
+#define ATMEL_BASE_AIC		0xFFFFF000
+#define ATMEL_BASE_DBGU		0xFFFFF200
+#define ATMEL_BASE_PIO		0xFFFFF400	/* 4x 0x200 Offset */
+#define ATMEL_BASE_PMC		0xFFFFFC00
+#define ATMEL_BASE_ST		0xFFFFFD00
+#define ATMEL_BASE_RTC		0xFFFFFE00
+#define ATMEL_BASE_MC		0xFFFFFF00
 
+#define AT91_PIO_BASE	ATMEL_BASE_PIO
 
 /* AT91RM9200 Periperial Multiplexing A */
 /* Port A */
-#define AT91_PMX_AA_EREFCK	0x00000080
-#define AT91_PMX_AA_ETXCK	0x00000080
-#define AT91_PMX_AA_ETXEN	0x00000100
-#define AT91_PMX_AA_ETX0	0x00000200
-#define AT91_PMX_AA_ETX1	0x00000400
-#define AT91_PMX_AA_ECRS	0x00000800
-#define AT91_PMX_AA_ECRSDV	0x00000800
-#define AT91_PMX_AA_ERX0	0x00001000
-#define AT91_PMX_AA_ERX1	0x00002000
-#define AT91_PMX_AA_ERXER	0x00004000
-#define AT91_PMX_AA_EMDC	0x00008000
-#define AT91_PMX_AA_EMDIO	0x00010000
-
-#define AT91_PMX_AA_TXD2	0x00810000
-
-#define AT91_PMX_AA_TWD		0x02000000
-#define AT91_PMX_AA_TWCK	0x04000000
+#define ATMEL_PMX_AA_EREFCK	0x00000080
+#define ATMEL_PMX_AA_ETXCK	0x00000080
+#define ATMEL_PMX_AA_ETXEN	0x00000100
+#define ATMEL_PMX_AA_ETX0	0x00000200
+#define ATMEL_PMX_AA_ETX1	0x00000400
+#define ATMEL_PMX_AA_ECRS	0x00000800
+#define ATMEL_PMX_AA_ECRSDV	0x00000800
+#define ATMEL_PMX_AA_ERX0	0x00001000
+#define ATMEL_PMX_AA_ERX1	0x00002000
+#define ATMEL_PMX_AA_ERXER	0x00004000
+#define ATMEL_PMX_AA_EMDC	0x00008000
+#define ATMEL_PMX_AA_EMDIO	0x00010000
+
+#define ATMEL_PMX_AA_TXD2	0x00810000
+
+#define ATMEL_PMX_AA_TWD	0x02000000
+#define ATMEL_PMX_AA_TWCK	0x04000000
 
 /* Port B */
-#define AT91_PMX_BA_ERXCK	0x00080000
-#define AT91_PMX_BA_ECOL	0x00040000
-#define AT91_PMX_BA_ERXDV	0x00020000
-#define AT91_PMX_BA_ERX3	0x00010000
-#define AT91_PMX_BA_ERX2 	0x00008000
-#define AT91_PMX_BA_ETXER	0x00004000
-#define AT91_PMX_BA_ETX3	0x00002000
-#define AT91_PMX_BA_ETX2	0x00001000
+#define ATMEL_PMX_BA_ERXCK	0x00080000
+#define ATMEL_PMX_BA_ECOL	0x00040000
+#define ATMEL_PMX_BA_ERXDV	0x00020000
+#define ATMEL_PMX_BA_ERX3	0x00010000
+#define ATMEL_PMX_BA_ERX2	0x00008000
+#define ATMEL_PMX_BA_ETXER	0x00004000
+#define ATMEL_PMX_BA_ETX3	0x00002000
+#define ATMEL_PMX_BA_ETX2	0x00001000
 
 /* Port B */
 
-#define AT91_PMX_CA_BFCK	0x00000001
-#define AT91_PMX_CA_BFRDY	0x00000002
-#define AT91_PMX_CA_SMOE	0x00000002
-#define AT91_PMX_CA_BFAVD	0x00000004
-#define AT91_PMX_CA_BFBAA	0x00000008
-#define AT91_PMX_CA_SMWE	0x00000008
-#define AT91_PMX_CA_BFOE	0x00000010
-#define AT91_PMX_CA_BFWE	0x00000020
-#define AT91_PMX_CA_NWAIT	0x00000040
-#define AT91_PMX_CA_A23		0x00000080
-#define AT91_PMX_CA_A24		0x00000100
-#define AT91_PMX_CA_A25		0x00000200
-#define AT91_PMX_CA_CFRNW	0x00000200
-#define AT91_PMX_CA_NCS4	0x00000400
-#define AT91_PMX_CA_CFCS	0x00000400
-#define AT91_PMX_CA_NCS5	0x00000800
-#define AT91_PMX_CA_CFCE1	0x00001000
-#define AT91_PMX_CA_NCS6	0x00001000
-#define AT91_PMX_CA_CFCE2	0x00002000
-#define AT91_PMX_CA_NCS7	0x00002000
-#define AT91_PMX_CA_D16_31	0xFFFF0000
-
-#define CONFIG_SYS_AT91_CPU_NAME	"AT91RM9200"
+#define ATMEL_PMX_CA_BFCK	0x00000001
+#define ATMEL_PMX_CA_BFRDY	0x00000002
+#define ATMEL_PMX_CA_SMOE	0x00000002
+#define ATMEL_PMX_CA_BFAVD	0x00000004
+#define ATMEL_PMX_CA_BFBAA	0x00000008
+#define ATMEL_PMX_CA_SMWE	0x00000008
+#define ATMEL_PMX_CA_BFOE	0x00000010
+#define ATMEL_PMX_CA_BFWE	0x00000020
+#define ATMEL_PMX_CA_NWAIT	0x00000040
+#define ATMEL_PMX_CA_A23	0x00000080
+#define ATMEL_PMX_CA_A24	0x00000100
+#define ATMEL_PMX_CA_A25	0x00000200
+#define ATMEL_PMX_CA_CFRNW	0x00000200
+#define ATMEL_PMX_CA_NCS4	0x00000400
+#define ATMEL_PMX_CA_CFCS	0x00000400
+#define ATMEL_PMX_CA_NCS5	0x00000800
+#define ATMEL_PMX_CA_CFCE1	0x00001000
+#define ATMEL_PMX_CA_NCS6	0x00001000
+#define ATMEL_PMX_CA_CFCE2	0x00002000
+#define ATMEL_PMX_CA_NCS7	0x00002000
+#define ATMEL_PMX_CA_D16_31	0xFFFF0000
+
+#define ATMEL_PIO_PORTS		4	/* theese SoCs have 4 PIO */
+#define ATMEL_PMC_UHP		AT91RM9200_PMC_UHP
+
+#define CONFIG_SYS_ATMEL_CPU_NAME	"AT91RM9200"
 
 #endif