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authorAlexey Brodkin <abrodkin@synopsys.com>2015-03-30 13:36:04 +0300
committerAlexey Brodkin <abrodkin@synopsys.com>2015-04-03 09:47:50 +0300
commit6eb15e50f48927c65a67371555b5afc24b3c7d21 (patch)
tree0e6f7a560fece41ed04cfdd3fad6591433c56e19 /arch/arm
parent09424d11192cffd4793b7bc922c5b47d4fe88a4d (diff)
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arc: add support for SLC (System Level Cache, AKA L2-cache)
ARCv2 cores may have built-in SLC (System Level Cache, AKA L2-cache). This change adds functions required for controlling SLC: * slc_enable/disable * slc_flush/invalidate For now we just disable SLC to escape DMA coherency issues until either: * SLC flush/invalidate is supported in DMA APIin U-Boot * hardware DMA coherency is implemented (that might be board specific so probably we'll need to have a separate Kconfig option for controlling SLC explicitly) Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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