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authorHoward D. Gray <howard.gray@matrix-vision.de>2011-09-04 14:11:17 -0400
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-09-12 17:40:48 +0200
commit32b58ce736f3195e937c1c4de7074315ef55c2fa (patch)
tree3e989f4f0f21c4352e080cb69675eedbb429d826 /arch/arm
parent89677b27d3393d34fe5d4caad868a9dbb32edd87 (diff)
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ARMV7: OMAP3: Add 37xx ESx revision numbers.
OMAP3: Add 37xx ESx revision numbers. Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Signed-off-by: Howard D. Gray <howard.gray@matrix-vision.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/armv7/omap3/sys_info.c13
-rw-r--r--arch/arm/include/asm/arch-omap3/omap3.h10
2 files changed, 22 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/omap3/sys_info.c b/arch/arm/cpu/armv7/omap3/sys_info.c
index 8d0496c..bdb151d 100644
--- a/arch/arm/cpu/armv7/omap3/sys_info.c
+++ b/arch/arm/cpu/armv7/omap3/sys_info.c
@@ -46,6 +46,12 @@ static char *rev_s[CPU_3XX_MAX_REV] = {
"3.1.2"};
#endif /* CONFIG_DISPLAY_CPUINFO */
+/* this is the revision table for 37xx CPUs */
+static char *rev_s_37xx[CPU_37XX_MAX_REV] = {
+ "1.0",
+ "1.1",
+ "1.2"};
+
/*****************************************************************
* dieid_num_r(void) - read and set die ID
*****************************************************************/
@@ -347,7 +353,12 @@ int print_cpuinfo (void)
sec_s = "?";
}
- printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
+ if (CPU_OMAP36XX == get_cpu_family())
+ printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
+ cpu_family_s, cpu_s, sec_s,
+ rev_s_37xx[get_cpu_rev()], max_clk);
+ else
+ printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
cpu_family_s, cpu_s, sec_s,
rev_s[get_cpu_rev()], max_clk);
diff --git a/arch/arm/include/asm/arch-omap3/omap3.h b/arch/arm/include/asm/arch-omap3/omap3.h
index 230eaad..c787408 100644
--- a/arch/arm/include/asm/arch-omap3/omap3.h
+++ b/arch/arm/include/asm/arch-omap3/omap3.h
@@ -191,6 +191,16 @@ struct gpio {
#define CPU_3XX_ES312 7
#define CPU_3XX_MAX_REV 8
+/*
+ * 37xx real hardware:
+ * ES1.0 onwards, the value maps to contents of IDCODE register [31:28].
+ */
+
+#define CPU_37XX_ES10 0
+#define CPU_37XX_ES11 1
+#define CPU_37XX_ES12 2
+#define CPU_37XX_MAX_REV 3
+
#define CPU_3XX_ID_SHIFT 28
#define WIDTH_8BIT 0x0000