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authorSimon Glass <sjg@chromium.org>2013-02-18 20:32:59 +0000
committerMinkyu Kang <mk7.kang@samsung.com>2013-03-12 10:35:09 +0900
commitc42ffff02a1edd24fc50e5efb33ead1bfa843a26 (patch)
tree2880469a4cf4e5223112bf8d205995b57bcd411e /arch/arm
parentcfa6df19091ec831a4767fe36907abb8a8e99f84 (diff)
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EXYNOS: Correct ordering of SPL machine_params
The mem_manuf is not in the correct order according to the string table. This causes cros_bundle_firmware to get the BL2 settings in the wrong order. This patch fixes the same. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/arch-exynos/spl.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-exynos/spl.h b/arch/arm/include/asm/arch-exynos/spl.h
index 306b41d..46b25a6 100644
--- a/arch/arm/include/asm/arch-exynos/spl.h
+++ b/arch/arm/include/asm/arch-exynos/spl.h
@@ -78,11 +78,12 @@ struct spl_machine_param {
*/
u32 uboot_size;
enum boot_mode boot_source; /* Boot device */
- enum mem_manuf mem_manuf; /* Memory Manufacturer */
unsigned frequency_mhz; /* Frequency of memory in MHz */
unsigned arm_freq_mhz; /* ARM Frequency in MHz */
u32 serial_base; /* Serial base address */
u32 i2c_base; /* i2c base address */
+ u32 board_rev_gpios; /* Board revision GPIOs */
+ enum mem_manuf mem_manuf; /* Memory Manufacturer */
} __attribute__((__packed__));
#endif