Merge branch 'master' of git://www.denx.de/git/u-boot-imx

6 files changed, 28 insertions, 15 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6881f36..c0b68cb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -654,6 +654,7 @@ config TARGET_KOSAGI_NOVENA
 
 config TARGET_TBS2910
 	bool "Support tbs2910"
+	select CPU_V7
 
 config TARGET_TQMA6
 	bool "TQ Systems TQMa6 board"
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index ab7ac3d..93a02ad 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -443,7 +443,7 @@ int enable_fec_anatop_clock(enum enet_freq freq)
 	struct anatop_regs __iomem *anatop =
 		(struct anatop_regs __iomem *)ANATOP_BASE_ADDR;
 
-	if (freq < ENET_25MHz || freq > ENET_125MHz)
+	if (freq < ENET_25MHZ || freq > ENET_125MHZ)
 		return -EINVAL;
 
 	reg = readl(&anatop->pll_enet);
diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c
index a26d63e..92aaad9 100644
--- a/arch/arm/cpu/armv7/vf610/generic.c
+++ b/arch/arm/cpu/armv7/vf610/generic.c
@@ -265,20 +265,21 @@ static char *get_reset_cause(void)
 
 	cause = readl(&src_regs->srsr);
 	writel(cause, &src_regs->srsr);
-	cause &= 0xff;
 
-	switch (cause) {
-	case 0x08:
-		return "WDOG";
-	case 0x20:
+	if (cause & SRC_SRSR_POR_RST)
+		return "POWER ON RESET";
+	else if (cause & SRC_SRSR_WDOG_A5)
+		return "WDOG A5";
+	else if (cause & SRC_SRSR_WDOG_M4)
+		return "WDOG M4";
+	else if (cause & SRC_SRSR_JTAG_RST)
 		return "JTAG HIGH-Z";
-	case 0x80:
+	else if (cause & SRC_SRSR_SW_RST)
+		return "SW RESET";
+	else if (cause & SRC_SRSR_RESETB)
 		return "EXTERNAL RESET";
-	case 0xfd:
-		return "POR";
-	default:
+	else
 		return "unknown reset";
-	}
 }
 
 int print_cpuinfo(void)
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index b58df7d..28ccd29 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -206,6 +206,9 @@ void arch_preboot_os(void)
 {
 #if defined(CONFIG_CMD_SATA)
 	sata_stop();
+#if defined(CONFIG_MX6)
+	disable_sata_clock();
+#endif
 #endif
 #if defined(CONFIG_VIDEO_IPUV3)
 	/* disable video before launching O/S */
diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h
index 323805c..226a4cd 100644
--- a/arch/arm/include/asm/arch-mx6/clock.h
+++ b/arch/arm/include/asm/arch-mx6/clock.h
@@ -43,10 +43,10 @@ enum mxc_clock {
 };
 
 enum enet_freq {
-	ENET_25MHz,
-	ENET_50MHz,
-	ENET_100MHz,
-	ENET_125MHz,
+	ENET_25MHZ,
+	ENET_50MHZ,
+	ENET_100MHZ,
+	ENET_125MHZ,
 };
 
 u32 imx_get_uartclk(void);
diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h b/arch/arm/include/asm/arch-vf610/imx-regs.h
index 9d797db..6b10bdf 100644
--- a/arch/arm/include/asm/arch-vf610/imx-regs.h
+++ b/arch/arm/include/asm/arch-vf610/imx-regs.h
@@ -256,6 +256,14 @@
 #define DDRMC_CR161_TODTH_RD(v)				(((v) & 0xf) << 8)
 #define DDRMC_CR161_TODTH_WR(v)				((v) & 0xf)
 
+/* System Reset Controller (SRC) */
+#define SRC_SRSR_SW_RST					(0x1 << 18)
+#define SRC_SRSR_RESETB					(0x1 << 7)
+#define SRC_SRSR_JTAG_RST				(0x1 << 5)
+#define SRC_SRSR_WDOG_M4				(0x1 << 4)
+#define SRC_SRSR_WDOG_A5				(0x1 << 3)
+#define SRC_SRSR_POR_RST				(0x1 << 0)
+
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>