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authorLaurence Withers <lwithers@guralp.com>2012-07-30 23:30:35 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-09-01 14:58:14 +0200
commit88ac6b9d1402b5a7b639131df95bdd2dbd54d69d (patch)
tree5842021210e1bded052f7a490a4d9aac58dac473 /arch/arm
parent8a54aa0da762045938adb706db57c48a1939a81d (diff)
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DaVinci DA850: UART2 clock ID comes from ASYNC3
On the DA830, UART2's clock is derived from PLL controller 0 output 2. On the DA850, it is in the ASYNC3 group, and may be switched between PLL controller 0 or 1. Fix the definition of the ID to match. Signed-off-by: Laurence Withers <lwithers@guralp.com> Cc: Tom Rini <trini@ti.com> Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/arch-davinci/hardware.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h
index 89bcbbe..674c529 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -467,7 +467,6 @@ enum davinci_clk_ids {
DAVINCI_MMC_CLKID = DAVINCI_PLL0_SYSCLK2,
DAVINCI_SPI0_CLKID = DAVINCI_PLL0_SYSCLK2,
DAVINCI_MMCSD_CLKID = DAVINCI_PLL0_SYSCLK2,
- DAVINCI_UART2_CLKID = DAVINCI_PLL0_SYSCLK2,
/* special clock ID - output of PLL multiplier */
DAVINCI_PLLM_CLKID = 0x0FF,
@@ -479,6 +478,9 @@ enum davinci_clk_ids {
DAVINCI_AUXCLK_CLKID = 0x101,
};
+#define DAVINCI_UART2_CLKID (cpu_is_da830() ? DAVINCI_PLL0_SYSCLK2 \
+ : get_async3_src())
+
#define DAVINCI_SPI1_CLKID (cpu_is_da830() ? DAVINCI_PLL0_SYSCLK2 \
: get_async3_src())