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authorRobin Gong <b38343@freescale.com>2014-11-04 19:18:56 +0800
committerRobin Gong <b38343@freescale.com>2014-11-11 11:25:08 +0800
commitb34b40e4918ced6792ea5f4b588bf394570e75cc (patch)
treefdeedfaec463d69691d2e3e4f9a8fc194b67a238 /arch/arm
parent4168bfe6940ede34e87fe61ed670310a91e20301 (diff)
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MLK-9819: ARM: mx6sx: clear WDOG3 Power Down Enable bit for i.mx6sx
Since we use WDOG_B reset now, we have to clear WDOG3 Power Down Enable bit to avoid system reboot during normal kernel boot. For mx6sxsabresd board, we have to make sure pad setting for WDOG_B ready before mux ready, otherwise also cause reboot. But that dependes on hardware design, only need on mx6sxsabresd board. Signed-off-by: Robin Gong <b38343@freescale.com> (cherry picked from commit 26875f93ac7e84748fa63e5f0dd948d12e663e43)
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index d7c109e..01776a6 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -228,6 +228,10 @@ static void imx_set_wdog_powerdown(bool enable)
{
struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR;
struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR;
+#ifdef CONFIG_MX6SX
+ struct wdog_regs *wdog3 = (struct wdog_regs *)WDOG3_BASE_ADDR;
+ writew(enable, &wdog3->wmcr);
+#endif
/* Write to the PDE (Power Down Enable) bit */
writew(enable, &wdog1->wmcr);