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authorYe.Li <B37916@freescale.com>2015-03-23 15:56:45 +0800
committerYe.Li <B37916@freescale.com>2015-03-23 22:30:34 +0800
commit96e13b57ead3ed00c3a32c5373c7a2a876947f99 (patch)
tree1af27e8c75d03cceaaa9a6a7c3188bd7ed6e07b7 /arch/arm
parent5e4d1537ce9a476c8404126350f05d8976c5aa35 (diff)
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MLK-10448-4 mx6: hab : Remove the cache issue workaroud in hab for i.MX6QP
Since the i.MX6QP has fixed the issue in boot ROM, so remove the workaround for i.MX6QP. Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/armv7/mx6/hab.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/mx6/hab.c b/arch/arm/cpu/armv7/mx6/hab.c
index e1d10b9..ff88680 100644
--- a/arch/arm/cpu/armv7/mx6/hab.c
+++ b/arch/arm/cpu/armv7/mx6/hab.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
+ * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -257,7 +257,8 @@ uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size)
* since their ROM doesn't do cache flushes.
* I don't think any exist, so we ignore them.
*/
- writel(1, 0x009024a8);
+ if (!is_mx6dqp())
+ writel(1, 0x009024a8);
} else if (is_cpu_type(MXC_CPU_MX6DL) ||
is_cpu_type(MXC_CPU_MX6SOLO)) {
writel(1, 0x00901dd0);