ENGR00287831 mx6: fix the secure boot issue on the new tapout chip

The new TO(i.MX6Q TO1.5 and i.MX6DL TO1.2) of ROM change the HAB API
table address, thus the secure boot can't boot up on the new TO.

This patch fix this issue by fix up the HAB API table address according
to the TO revision.

Signed-off-by: Jason Liu <r64343@freescale.com>

4 files changed, 81 insertions, 15 deletions

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index a8917b3..698c0f3 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -547,14 +547,51 @@ int arch_misc_init(void)
 #endif /* !CONFIG_ARCH_MISC_INIT */
 
 #ifdef CONFIG_SECURE_BOOT
-/* -------- start of HAB API updates ------------*/
-#define hab_rvt_report_event ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)
-#define hab_rvt_report_status ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)
-#define hab_rvt_authenticate_image \
-	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)
-#define hab_rvt_entry ((hab_rvt_entry_t *) HAB_RVT_ENTRY)
-#define hab_rvt_exit ((hab_rvt_exit_t *) HAB_RVT_EXIT)
-#define hab_rvt_clock_init HAB_RVT_CLOCK_INIT
+
+#define hab_rvt_report_event_p						\
+(									\
+	(is_mx6dq() && (is_soc_rev(CHIP_REV_1_5) >= 0)) ?		\
+	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :		\
+	(is_mx6dlsolo() && (is_soc_rev(CHIP_REV_1_2) >= 0)) ?		\
+	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :		\
+	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)		\
+)
+
+#define hab_rvt_report_status_p						\
+(									\
+	(is_mx6dq() && (is_soc_rev(CHIP_REV_1_5) >= 0)) ?		\
+	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :	\
+	(is_mx6dlsolo() && (is_soc_rev(CHIP_REV_1_2) >= 0)) ?		\
+	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :	\
+	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)		\
+)
+
+#define hab_rvt_authenticate_image_p					\
+(									\
+	(is_mx6dq() && (is_soc_rev(CHIP_REV_1_5) >= 0)) ?		\
+	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
+	(is_mx6dlsolo() && (is_soc_rev(CHIP_REV_1_2) >= 0)) ?		\
+	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) :\
+	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)	\
+)
+
+#define hab_rvt_entry_p							\
+(									\
+	(is_mx6dq() && (is_soc_rev(CHIP_REV_1_5) >= 0)) ?		\
+	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :			\
+	(is_mx6dlsolo() && (is_soc_rev(CHIP_REV_1_2) >= 0)) ?		\
+	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :			\
+	((hab_rvt_entry_t *)HAB_RVT_ENTRY)				\
+)
+
+#define hab_rvt_exit_p							\
+(									\
+	(is_mx6dq() && (is_soc_rev(CHIP_REV_1_5) >= 0)) ?		\
+	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :				\
+	(is_mx6dlsolo() && (is_soc_rev(CHIP_REV_1_2) >= 0)) ?		\
+	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :				\
+	((hab_rvt_exit_t *)HAB_RVT_EXIT)				\
+)
 
 #define IVT_SIZE		0x20
 #define ALIGN_SIZE		0x1000
@@ -629,6 +666,11 @@ int get_hab_status(void)
 	size_t bytes = sizeof(event_data); /* Event size in bytes */
 	hab_config_t config = 0;
 	hab_state_t state = 0;
+	hab_rvt_report_event_t *hab_rvt_report_event;
+	hab_rvt_report_status_t *hab_rvt_report_status;
+
+	hab_rvt_report_event = hab_rvt_report_event_p;
+	hab_rvt_report_status = hab_rvt_report_status_p;
 
 	/* Check HAB status */
 	if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
@@ -706,6 +748,13 @@ uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size)
 	ptrdiff_t ivt_offset = 0;
 	int result = 0;
 	ulong start;
+	hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
+	hab_rvt_entry_t *hab_rvt_entry;
+	hab_rvt_exit_t *hab_rvt_exit;
+
+	hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
+	hab_rvt_entry = hab_rvt_entry_p;
+	hab_rvt_exit = hab_rvt_exit_p;
 
 	if (check_hab_enable() == 1) {
 		printf("\nAuthenticate uImage from DDR location 0x%x...\n",
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 0a842a4..3b3fc95 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -228,6 +228,11 @@
 #define IP2APB_USBPHY2_BASE_ADDR    (AIPS2_OFF_BASE_ADDR + 0x7C000)
 
 #define CHIP_REV_1_0                 0x10
+#define CHIP_REV_1_1                 0x11
+#define CHIP_REV_1_2                 0x12
+#define CHIP_REV_1_3                 0x13
+#define CHIP_REV_1_4                 0x14
+#define CHIP_REV_1_5                 0x15
 #define IRAM_SIZE                    0x00040000
 #define IMX_IIM_BASE                 OCOTP_BASE_ADDR
 #define FEC_QUIRK_ENET_MAC
diff --git a/arch/arm/include/asm/arch-mx6/mx6_secure.h b/arch/arm/include/asm/arch-mx6/mx6_secure.h
index 84616c4..6fe2402 100644
--- a/arch/arm/include/asm/arch-mx6/mx6_secure.h
+++ b/arch/arm/include/asm/arch-mx6/mx6_secure.h
@@ -66,12 +66,17 @@ typedef void *hab_rvt_authenticate_image_t(uint8_t, ptrdiff_t, \
 		void **, size_t *, hab_loader_callback_f_t);
 typedef void hapi_clock_init_t(void);
 
-#define HAB_RVT_REPORT_EVENT (*(uint32_t *) 0x000000B4)
-#define HAB_RVT_REPORT_STATUS (*(uint32_t *) 0x000000B8)
-#define HAB_RVT_AUTHENTICATE_IMAGE (*(uint32_t *) 0x000000A4)
-#define HAB_RVT_ENTRY (*(uint32_t *) 0x00000098)
-#define HAB_RVT_EXIT (*(uint32_t *) 0x0000009C)
-#define HAB_RVT_CLOCK_INIT ((hapi_clock_init_t *) 0x0000024D)
+#define HAB_RVT_REPORT_EVENT			(*(uint32_t *) 0x000000B4)
+#define HAB_RVT_REPORT_STATUS			(*(uint32_t *) 0x000000B8)
+#define HAB_RVT_AUTHENTICATE_IMAGE		(*(uint32_t *) 0x000000A4)
+#define HAB_RVT_ENTRY				(*(uint32_t *) 0x00000098)
+#define HAB_RVT_EXIT				(*(uint32_t *) 0x0000009C)
+
+#define HAB_RVT_REPORT_EVENT_NEW		(*(uint32_t *) 0x000000B8)
+#define HAB_RVT_REPORT_STATUS_NEW		(*(uint32_t *) 0x000000BC)
+#define HAB_RVT_AUTHENTICATE_IMAGE_NEW		(*(uint32_t *) 0x000000A8)
+#define HAB_RVT_ENTRY_NEW			(*(uint32_t *) 0x0000009C)
+#define HAB_RVT_EXIT_NEW			(*(uint32_t *) 0x000000A0)
 
 #define HAB_CID_ROM 0 /**< ROM Caller ID */
 #define HAB_CID_UBOOT 1 /**< UBOOT Caller ID*/
diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h
index 135169f..3a756d8 100644
--- a/arch/arm/include/asm/arch-mx6/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx6/sys_proto.h
@@ -33,7 +33,14 @@
 #define MXC_CPU_MX6SOLO		0x62
 #define MXC_CPU_MX6Q		0x63
 
-#define is_soc_rev(rev)	((get_cpu_rev() & 0xFF) - rev)
+#define is_soc_rev(rev)		((int)((get_cpu_rev() & 0xFF) - rev))
+#define is_soc(soc)		(((get_cpu_rev() >> 12) & 0xFF) ==  (soc))
+#define is_mx6dq()		is_soc(MXC_CPU_MX6Q)
+#define is_mx6dl()		is_soc(MXC_CPU_MX6DL)
+#define is_mx6solo()		is_soc(MXC_CPU_MX6SOLO)
+#define is_mx6dlsolo()		(is_mx6dl() || is_mx6solo())
+#define is_mx6sl()		is_soc(MXC_CPU_MX6SL)
+
 u32 get_cpu_rev(void);
 const char *get_imx_type(u32 imxtype);
 unsigned imx_ddr_size(void);