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authorJason Liu <r64343@freescale.com>2013-08-14 07:09:27 +0800
committerJason Liu <r64343@freescale.com>2013-08-21 14:54:17 +0800
commit7b9b2eaad9307220ac7dc9ae2d102d44555acafb (patch)
tree0ec67ce5c825c9e72ecc2094d284f8512ea35190 /arch/arm
parent2d6b2cd4b7ecb5cdec79949eeb458eb6121295b9 (diff)
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ENGR00275348-1 imx6: turn on L2 cache support
This patch is to turn on the L2 cache support Signed-off-by: Jason Liu <r64343@freescale.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 7409df8..f4bac7a 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -24,6 +24,8 @@
*/
#include <common.h>
+#include <asm/armv7.h>
+#include <asm/pl310.h>
#include <asm/errno.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
@@ -439,3 +441,21 @@ const struct boot_mode soc_boot_modes[] = {
void s_init(void)
{
}
+
+#ifndef CONFIG_SYS_L2CACHE_OFF
+void v7_outer_cache_enable(void)
+{
+ struct pl310_regs *const pl310 =
+ (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
+
+ writel(1, &pl310->pl310_ctrl);
+}
+
+void v7_outer_cache_disable(void)
+{
+ struct pl310_regs *const pl310 =
+ (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
+
+ writel(0, &pl310->pl310_ctrl);
+}
+#endif /* !CONFIG_SYS_L2CACHE_OFF */