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authorManjunath Hadli <manjunath.hadli@ti.com>2011-10-13 03:40:55 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-10-27 21:56:36 +0200
commitfb1d6332b5430b90a8fa8ebab709f33a60e9f816 (patch)
tree97a3086547d3f926d318ce4a6d3808408f00f580 /arch/arm
parent062fe7d332c28ede25626f448681e43d76bb312e (diff)
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davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM
remove macro CONFIG_EMAC_MDIO_PHY_NUM and depending macro EMAC_MDIO_PHY_NUM as they are no longer needed with the support for more than 1 PHYs in davinci emac driver. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/arm926ejs/davinci/et1011c.c6
-rw-r--r--arch/arm/include/asm/arch-davinci/emac_defs.h4
2 files changed, 2 insertions, 8 deletions
diff --git a/arch/arm/cpu/arm926ejs/davinci/et1011c.c b/arch/arm/cpu/arm926ejs/davinci/et1011c.c
index da07345..df35e44 100644
--- a/arch/arm/cpu/arm926ejs/davinci/et1011c.c
+++ b/arch/arm/cpu/arm926ejs/davinci/et1011c.c
@@ -39,11 +39,9 @@ int et1011c_get_link_speed(int phy_addr)
u_int16_t data;
if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &data) && (data & 0x04)) {
- davinci_eth_phy_read(EMAC_MDIO_PHY_NUM,
- MII_PHY_CONFIG_REG, &data);
+ davinci_eth_phy_read(phy_addr, MII_PHY_CONFIG_REG, &data);
/* Enable 125MHz clock sourced from PHY */
- davinci_eth_phy_write(EMAC_MDIO_PHY_NUM,
- MII_PHY_CONFIG_REG,
+ davinci_eth_phy_write(phy_addr, MII_PHY_CONFIG_REG,
data | PHY_SYS_CLK_EN);
return (1);
}
diff --git a/arch/arm/include/asm/arch-davinci/emac_defs.h b/arch/arm/include/asm/arch-davinci/emac_defs.h
index 294a9a8..ea52888 100644
--- a/arch/arm/include/asm/arch-davinci/emac_defs.h
+++ b/arch/arm/include/asm/arch-davinci/emac_defs.h
@@ -84,10 +84,6 @@
#define EMAC_MDIO_CLOCK_FREQ 2000000 /* 2.0 MHz */
#endif
-/* PHY mask - set only those phy number bits where phy is/can be connected */
-#define EMAC_MDIO_PHY_NUM CONFIG_EMAC_MDIO_PHY_NUM
-#define EMAC_MDIO_PHY_MASK (1 << EMAC_MDIO_PHY_NUM)
-
/* Ethernet Min/Max packet size */
#define EMAC_MIN_ETHERNET_PKT_SIZE 60
#define EMAC_MAX_ETHERNET_PKT_SIZE 1518