ARM: tegra: Tegra30 pinmux cleanup

This renames all the pinmux pins, drive groups, and functions so they
have a prefix which matches the type name. These lists are also auto-
generated using scripts that were also used to generate the kernel
pinctrl drivers. This ensures that the lists are consistent between the
two.

The entries in tegra30_pingroups[] are all updated to remove the columns
which are no longer used.

All affected code is updated to match.

This introduces a few changes to pin/group/function naming and the set of
available functions for each pin. The new values now exactly match the
TRM; the chip documentation. I adjusted one entry in
pinmux-config-cardhu.h due to this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

3 files changed, 609 insertions, 678 deletions

diff --git a/arch/arm/cpu/tegra30-common/funcmux.c b/arch/arm/cpu/tegra30-common/funcmux.c
index e24c57e..409335c 100644
--- a/arch/arm/cpu/tegra30-common/funcmux.c
+++ b/arch/arm/cpu/tegra30-common/funcmux.c
@@ -29,14 +29,18 @@ int funcmux_select(enum periph_id id, int config)
 	case PERIPH_ID_UART1:
 		switch (config) {
 		case FUNCMUX_UART1_ULPI:
-			pinmux_set_func(PINGRP_ULPI_DATA0, PMUX_FUNC_UARTA);
-			pinmux_set_func(PINGRP_ULPI_DATA1, PMUX_FUNC_UARTA);
-			pinmux_set_func(PINGRP_ULPI_DATA2, PMUX_FUNC_UARTA);
-			pinmux_set_func(PINGRP_ULPI_DATA3, PMUX_FUNC_UARTA);
-			pinmux_tristate_disable(PINGRP_ULPI_DATA0);
-			pinmux_tristate_disable(PINGRP_ULPI_DATA1);
-			pinmux_tristate_disable(PINGRP_ULPI_DATA2);
-			pinmux_tristate_disable(PINGRP_ULPI_DATA3);
+			pinmux_set_func(PMUX_PINGRP_ULPI_DATA0_PO1,
+					PMUX_FUNC_UARTA);
+			pinmux_set_func(PMUX_PINGRP_ULPI_DATA1_PO2,
+					PMUX_FUNC_UARTA);
+			pinmux_set_func(PMUX_PINGRP_ULPI_DATA2_PO3,
+					PMUX_FUNC_UARTA);
+			pinmux_set_func(PMUX_PINGRP_ULPI_DATA3_PO4,
+					PMUX_FUNC_UARTA);
+			pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA0_PO1);
+			pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA1_PO2);
+			pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA2_PO3);
+			pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA3_PO4);
 			break;
 		}
 		break;
diff --git a/arch/arm/cpu/tegra30-common/pinmux.c b/arch/arm/cpu/tegra30-common/pinmux.c
index f1d1993..7eb0574 100644
--- a/arch/arm/cpu/tegra30-common/pinmux.c
+++ b/arch/arm/cpu/tegra30-common/pinmux.c
@@ -1,292 +1,276 @@
 /*
- * Copyright (c) 2010-2013, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2010-2014, NVIDIA CORPORATION. All rights reserved.
  *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ * SPDX-License-Identifier: GPL-2.0+
  */
 
-/* Tegra30 pin multiplexing functions */
-
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/pinmux.h>
 
-/* Convenient macro for defining pin group properties */
-#define PIN(pg_name, vdd, f0, f1, f2, f3, iod)		\
-	{						\
-		.funcs = {				\
-			PMUX_FUNC_ ## f0,		\
-			PMUX_FUNC_ ## f1,		\
-			PMUX_FUNC_ ## f2,		\
-			PMUX_FUNC_ ## f3,		\
-		},					\
+#define PIN(pin, f0, f1, f2, f3)	\
+	{				\
+		.funcs = {		\
+			PMUX_FUNC_##f0,	\
+			PMUX_FUNC_##f1,	\
+			PMUX_FUNC_##f2,	\
+			PMUX_FUNC_##f3,	\
+		},			\
 	}
 
-/* Input and output pins */
-#define PINI(pg_name, vdd, f0, f1, f2, f3) \
-	PIN(pg_name, vdd, f0, f1, f2, f3, INPUT)
-#define PINO(pg_name, vdd, f0, f1, f2, f3) \
-	PIN(pg_name, vdd, f0, f1, f2, f3, OUTPUT)
+#define PIN_RESERVED {}
 
-static const struct pmux_pingrp_desc tegra30_pingroups[PMUX_PINGRP_COUNT] = {
-	/*	NAME	  VDD	   f0		f1	   f2	    f3  */
-	PINI(ULPI_DATA0,  BB,	   SPI3,	HSI,	   UARTA,   ULPI),
-	PINI(ULPI_DATA1,  BB,	   SPI3,	HSI,	   UARTA,   ULPI),
-	PINI(ULPI_DATA2,  BB,	   SPI3,	HSI,	   UARTA,   ULPI),
-	PINI(ULPI_DATA3,  BB,	   SPI3,	HSI,	   UARTA,   ULPI),
-	PINI(ULPI_DATA4,  BB,	   SPI2,	HSI,	   UARTA,   ULPI),
-	PINI(ULPI_DATA5,  BB,	   SPI2,	HSI,	   UARTA,   ULPI),
-	PINI(ULPI_DATA6,  BB,	   SPI2,	HSI,	   UARTA,   ULPI),
-	PINI(ULPI_DATA7,  BB,	   SPI2,	HSI,	   UARTA,   ULPI),
-	PINI(ULPI_CLK,	  BB,	   SPI1,	RSVD2,	   UARTD,   ULPI),
-	PINI(ULPI_DIR,	  BB,	   SPI1,	RSVD2,	   UARTD,   ULPI),
-	PINI(ULPI_NXT,	  BB,	   SPI1,	RSVD2,	   UARTD,   ULPI),
-	PINI(ULPI_STP,	  BB,	   SPI1,	RSVD2,	   UARTD,   ULPI),
-	PINI(DAP3_FS,	  BB,	   I2S2,	RSVD2,	   DISPA,   DISPB),
-	PINI(DAP3_DIN,	  BB,	   I2S2,	RSVD2,	   DISPA,   DISPB),
-	PINI(DAP3_DOUT,	  BB,	   I2S2,	RSVD2,	   DISPA,   DISPB),
-	PINI(DAP3_SCLK,	  BB,	   I2S2,	RSVD2,	   DISPA,   DISPB),
-	PINI(GPIO_PV0,	  BB,	   RSVD1,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(GPIO_PV1,	  BB,	   RSVD1,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(SDMMC1_CLK,  SDMMC1,  SDMMC1,	RSVD2,	   RSVD3,   UARTA),
-	PINI(SDMMC1_CMD,  SDMMC1,  SDMMC1,	RSVD2,	   RSVD3,   UARTA),
-	PINI(SDMMC1_DAT3, SDMMC1,  SDMMC1,	RSVD2,	   UARTE,   UARTA),
-	PINI(SDMMC1_DAT2, SDMMC1,  SDMMC1,	RSVD2,	   UARTE,   UARTA),
-	PINI(SDMMC1_DAT1, SDMMC1,  SDMMC1,	RSVD2,	   UARTE,   UARTA),
-	PINI(SDMMC1_DAT0, SDMMC1,  SDMMC1,	RSVD2,	   UARTE,   UARTA),
-	PINI(GPIO_PV2,	  SDMMC1,  OWR,		RSVD2,	   RSVD3,   RSVD4),
-	PINI(GPIO_PV3,	  SDMMC1,  CLK_12M_OUT,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(CLK2_OUT,	  SDMMC1,  EXTPERIPH2,	RSVD2,     RSVD3,   RSVD4),
-	PINI(CLK2_REQ,	  SDMMC1,  DAP,		RSVD2,	   RSVD3,   RSVD4),
-	PINO(LCD_PWR1,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_PWR2,	  LCD,	   DISPA,	DISPB,	   SPI5,    HDCP),
-	PINO(LCD_SDIN,	  LCD,	   DISPA,	DISPB,	   SPI5,    RSVD4),
-	PINO(LCD_SDOUT,	  LCD,	   DISPA,	DISPB,	   SPI5,    HDCP),
-	PINO(LCD_WR_N,	  LCD,	   DISPA,	DISPB,	   SPI5,    HDCP),
-	PINO(LCD_CS0_N,	  LCD,	   DISPA,	DISPB,	   SPI5,    RSVD4),
-	PINO(LCD_DC0,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_SCK,	  LCD,	   DISPA,	DISPB,	   SPI5,    HDCP),
-	PINO(LCD_PWR0,	  LCD,	   DISPA,	DISPB,	   SPI5,    HDCP),
-	PINO(LCD_PCLK,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_DE,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_HSYNC,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_VSYNC,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D0,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D1,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D2,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D3,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D4,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D5,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D6,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D7,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D8,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D9,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D10,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D11,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D12,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D13,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D14,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D15,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D16,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D17,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D18,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D19,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D20,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D21,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D22,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_D23,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_CS1_N,	  LCD,	   DISPA,	DISPB,	   SPI5,    RSVD4),
-	PINO(LCD_M1,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINO(LCD_DC1,	  LCD,	   DISPA,	DISPB,	   RSVD3,   RSVD4),
-	PINI(HDMI_INT,	  LCD,	   HDMI,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(DDC_SCL,	  LCD,	   I2C4,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(DDC_SDA,	  LCD,	   I2C4,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(CRT_HSYNC,	  LCD,	   CRT,		RSVD2,	   RSVD3,   RSVD4),
-	PINI(CRT_VSYNC,	  LCD,	   CRT,		RSVD2,	   RSVD3,   RSVD4),
-	PINI(VI_D0,	  VI,	   DDR,		RSVD2,	   VI,      RSVD4),
-	PINI(VI_D1,	  VI,	   DDR,		SDMMC2,	   VI,      RSVD4),
-	PINI(VI_D2,	  VI,	   DDR,		SDMMC2,	   VI,      RSVD4),
-	PINI(VI_D3,	  VI,	   DDR,		SDMMC2,	   VI,      RSVD4),
-	PINI(VI_D4,	  VI,	   DDR,		SDMMC2,	   VI,      RSVD4),
-	PINI(VI_D5,	  VI,	   DDR,		SDMMC2,	   VI,      RSVD4),
-	PINI(VI_D6,	  VI,	   DDR,		SDMMC2,	   VI,      RSVD4),
-	PINI(VI_D7,	  VI,	   DDR,		SDMMC2,	   VI,      RSVD4),
-	PINI(VI_D8,	  VI,	   DDR,		SDMMC2,	   VI,      RSVD4),
-	PINI(VI_D9,	  VI,	   DDR,		SDMMC2,	   VI,      RSVD4),
-	PINI(VI_D10,	  VI,	   DDR,		RSVD2,	   VI,      RSVD4),
-	PINI(VI_D11,	  VI,	   DDR,		RSVD2,	   VI,      RSVD4),
-	PINI(VI_PCLK,	  VI,	   RSVD1,	SDMMC2,	   VI,      RSVD4),
-	PINI(VI_MCLK,	  VI,	   VI,		VI,	   VI,      VI),
-	PINI(VI_VSYNC,	  VI,	   DDR,		RSVD2,	   VI,      RSVD4),
-	PINI(VI_HSYNC,	  VI,	   DDR,		RSVD2,	   VI,      RSVD4),
-	PINI(UART2_RXD,	  UART,	   UARTB,	SPDIF,	   UARTA,   SPI4),
-	PINI(UART2_TXD,	  UART,	   UARTB,	SPDIF,	   UARTA,   SPI4),
-	PINI(UART2_RTS_N, UART,	   UARTA,	UARTB,	   GMI,     SPI4),
-	PINI(UART2_CTS_N, UART,	   UARTA,	UARTB,	   GMI,     SPI4),
-	PINI(UART3_TXD,	  UART,	   UARTC,	RSVD2,	   GMI,     RSVD4),
-	PINI(UART3_RXD,	  UART,	   UARTC,	RSVD2,	   GMI,     RSVD4),
-	PINI(UART3_CTS_N, UART,	   UARTC,	RSVD2,	   GMI,     RSVD4),
-	PINI(UART3_RTS_N, UART,	   UARTC,	PWM0,	   GMI,     RSVD4),
-	PINI(GPIO_PU0,	  UART,	   OWR,		UARTA,	   GMI,     RSVD4),
-	PINI(GPIO_PU1,	  UART,	   RSVD1,	UARTA,	   GMI,     RSVD4),
-	PINI(GPIO_PU2,	  UART,	   RSVD1,	UARTA,	   GMI,     RSVD4),
-	PINI(GPIO_PU3,	  UART,	   PWM0,	UARTA,	   GMI,     RSVD4),
-	PINI(GPIO_PU4,	  UART,	   PWM1,	UARTA,	   GMI,     RSVD4),
-	PINI(GPIO_PU5,	  UART,	   PWM2,	UARTA,	   GMI,     RSVD4),
-	PINI(GPIO_PU6,	  UART,	   PWM3,	UARTA,	   GMI,     RSVD4),
-	PINI(GEN1_I2C_SDA, UART,   I2C1,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(GEN1_I2C_SCL, UART,   I2C1,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(DAP4_FS,	  UART,	   I2S3,	RSVD2,	   GMI,     RSVD4),
-	PINI(DAP4_DIN,	  UART,	   I2S3,	RSVD2,	   GMI,     RSVD4),
-	PINI(DAP4_DOUT,	  UART,	   I2S3,	RSVD2,	   GMI,     RSVD4),
-	PINI(DAP4_SCLK,	  UART,	   I2S3,	RSVD2,	   GMI,     RSVD4),
-	PINI(CLK3_OUT,	  UART,	   EXTPERIPH3,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(CLK3_REQ,	  UART,	   DEV3,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(GMI_WP_N,	  GMI,	   RSVD1,	NAND,	   GMI,     GMI_ALT),
-	PINI(GMI_IORDY,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_WAIT,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_ADV_N,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_CLK,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_CS0_N,	  GMI,	   RSVD1,	NAND,	   GMI,     DTV),
-	PINI(GMI_CS1_N,	  GMI,	   RSVD1,	NAND,	   GMI,     DTV),
-	PINI(GMI_CS2_N,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_CS3_N,	  GMI,	   RSVD1,	NAND,	   GMI,     GMI_ALT),
-	PINI(GMI_CS4_N,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_CS6_N,	  GMI,	   NAND,	NAND_ALT,  GMI,     SATA),
-	PINI(GMI_CS7_N,	  GMI,	   NAND,	NAND_ALT,  GMI,     GMI_ALT),
-	PINI(GMI_AD0,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_AD1,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_AD2,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_AD3,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_AD4,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_AD5,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_AD6,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_AD7,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_AD8,	  GMI,	   PWM0,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_AD9,	  GMI,	   PWM1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_AD10,	  GMI,	   PWM2,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_AD11,	  GMI,	   PWM3,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_AD12,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_AD13,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_AD14,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_AD15,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_A16,	  GMI,	   UARTD,	SPI4,	   GMI,     GMI_ALT),
-	PINI(GMI_A17,	  GMI,	   UARTD,	SPI4,	   GMI,     DTV),
-	PINI(GMI_A18,	  GMI,	   UARTD,	SPI4,	   GMI,     DTV),
-	PINI(GMI_A19,	  GMI,	   UARTD,	SPI4,	   GMI,     RSVD4),
-	PINI(GMI_WR_N,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_OE_N,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_DQS,	  GMI,	   RSVD1,	NAND,	   GMI,     RSVD4),
-	PINI(GMI_RST_N,	  GMI,	   NAND,	NAND_ALT,  GMI,     RSVD4),
-	PINI(GEN2_I2C_SCL, GMI,	   I2C2,	HDCP,	   GMI,     RSVD4),
-	PINI(GEN2_I2C_SDA, GMI,    I2C2,	HDCP,	   GMI,     RSVD4),
-	PINI(SDMMC4_CLK,  SDMMC4,   RSVD1,	NAND,	   GMI,     SDMMC4),
-	PINI(SDMMC4_CMD,  SDMMC4,   I2C3,	NAND,	   GMI,     SDMMC4),
-	PINI(SDMMC4_DAT0, SDMMC4,   UARTE,	SPI3,	   GMI,     SDMMC4),
-	PINI(SDMMC4_DAT1, SDMMC4,   UARTE,	SPI3,	   GMI,     SDMMC4),
-	PINI(SDMMC4_DAT2, SDMMC4,   UARTE,	SPI3,	   GMI,     SDMMC4),
-	PINI(SDMMC4_DAT3, SDMMC4,   UARTE,	SPI3,	   GMI,     SDMMC4),
-	PINI(SDMMC4_DAT4, SDMMC4,   I2C3,	I2S4,	   GMI,     SDMMC4),
-	PINI(SDMMC4_DAT5, SDMMC4,   VGP3,	I2S4,	   GMI,     SDMMC4),
-	PINI(SDMMC4_DAT6, SDMMC4,   VGP4,	I2S4,	   GMI,     SDMMC4),
-	PINI(SDMMC4_DAT7, SDMMC4,   VGP5,	I2S4,	   GMI,     SDMMC4),
-	PINI(SDMMC4_RST_N, SDMMC4,  VGP6,	RSVD2,	   RSVD3,   SDMMC4),
-	PINI(CAM_MCLK,	  CAM,	   VI,		RSVD2,	   VI_ALT2, SDMMC4),
-	PINI(GPIO_PCC1,	  CAM,	   I2S4,	RSVD2,	   RSVD3,   SDMMC4),
-	PINI(GPIO_PBB0,	  CAM,	   I2S4,	RSVD2,	   RSVD3,   SDMMC4),
-	PINI(CAM_I2C_SCL, CAM,	   VGP1,	I2C3,	   RSVD3,   SDMMC4),
-	PINI(CAM_I2C_SDA, CAM,	   VGP2,	I2C3,	   RSVD3,   SDMMC4),
-	PINI(GPIO_PBB3,	  CAM,	   VGP3,	DISPA,	   DISPB,   SDMMC4),
-	PINI(GPIO_PBB4,	  CAM,	   VGP4,	DISPA,	   DISPB,   SDMMC4),
-	PINI(GPIO_PBB5,	  CAM,	   VGP5,	DISPA,	   DISPB,   SDMMC4),
-	PINI(GPIO_PBB6,	  CAM,	   VGP6,	DISPA,	   DISPB,   SDMMC4),
-	PINI(GPIO_PBB7,	  CAM,	   I2S4,	RSVD2,	   RSVD3,   SDMMC4),
-	PINI(GPIO_PCC2,	  CAM,	   I2S4,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(JTAG_RTCK,	  SYS,	   RTCK,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(PWR_I2C_SCL, SYS,	   I2CPWR,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(PWR_I2C_SDA, SYS,	   I2CPWR,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(KB_ROW0,	  SYS,	   KBC,		NAND,	   RSVD3,   RSVD4),
-	PINI(KB_ROW1,	  SYS,	   KBC,		NAND,	   RSVD3,   RSVD4),
-	PINI(KB_ROW2,	  SYS,	   KBC,		NAND,	   RSVD3,   RSVD4),
-	PINI(KB_ROW3,	  SYS,	   KBC,		NAND,	   RSVD3,   RSVD4),
-	PINI(KB_ROW4,	  SYS,	   KBC,		NAND,	   TRACE,   RSVD4),
-	PINI(KB_ROW5,	  SYS,	   KBC,		NAND,	   TRACE,   OWR),
-	PINI(KB_ROW6,	  SYS,	   KBC,		NAND,	   SDMMC2,  MIO),
-	PINI(KB_ROW7,	  SYS,	   KBC,		NAND,	   SDMMC2,  MIO),
-	PINI(KB_ROW8,	  SYS,	   KBC,		NAND,	   SDMMC2,  MIO),
-	PINI(KB_ROW9,	  SYS,	   KBC,		NAND,	   SDMMC2,  MIO),
-	PINI(KB_ROW10,	  SYS,	   KBC,		NAND,	   SDMMC2,  MIO),
-	PINI(KB_ROW11,	  SYS,	   KBC,		NAND,	   SDMMC2,  MIO),
-	PINI(KB_ROW12,	  SYS,	   KBC,		NAND,	   SDMMC2,  MIO),
-	PINI(KB_ROW13,	  SYS,	   KBC,		NAND,	   SDMMC2,  MIO),
-	PINI(KB_ROW14,	  SYS,	   KBC,		NAND,	   SDMMC2,  MIO),
-	PINI(KB_ROW15,	  SYS,	   KBC,		NAND,	   SDMMC2,  MIO),
-	PINI(KB_COL0,	  SYS,	   KBC,		NAND,	   TRACE,   TEST),
-	PINI(KB_COL1,	  SYS,	   KBC,		NAND,	   TRACE,   TEST),
-	PINI(KB_COL2,	  SYS,	   KBC,		NAND,	   TRACE,   RSVD4),
-	PINI(KB_COL3,	  SYS,	   KBC,		NAND,	   TRACE,   RSVD4),
-	PINI(KB_COL4,	  SYS,	   KBC,		NAND,	   TRACE,   RSVD4),
-	PINI(KB_COL5,	  SYS,	   KBC,		NAND,	   TRACE,   RSVD4),
-	PINI(KB_COL6,	  SYS,	   KBC,		NAND,	   TRACE,   MIO),
-	PINI(KB_COL7,	  SYS,	   KBC,		NAND,	   TRACE,   MIO),
-	PINI(CLK_32K_OUT, SYS,	   BLINK,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(SYS_CLK_REQ, SYS,	   SYSCLK,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(CORE_PWR_REQ, SYS,	   CORE_PWR_REQ, RSVD2,	   RSVD3,   RSVD4),
-	PINI(CPU_PWR_REQ, SYS,	   CPU_PWR_REQ,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(PWR_INT_N,	  SYS,	   PWR_INT_N,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(CLK_32K_IN,  SYS,	   CLK_32K_IN,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(OWR,	  SYS,	   OWR,		CEC,	   RSVD3,   RSVD4),
-	PINI(DAP1_FS,	  AUDIO,   I2S0,	HDA,	   GMI,     SDMMC2),
-	PINI(DAP1_DIN,	  AUDIO,   I2S0,	HDA,	   GMI,     SDMMC2),
-	PINI(DAP1_DOUT,	  AUDIO,   I2S0,	HDA,	   GMI,     SDMMC2),
-	PINI(DAP1_SCLK,	  AUDIO,   I2S0,	HDA,	   GMI,     SDMMC2),
-	PINI(CLK1_REQ,	  AUDIO,   DAP,		HDA,	   RSVD3,   RSVD4),
-	PINI(CLK1_OUT,	  AUDIO,   EXTPERIPH1,	RSVD2,	   RSVD3,   RSVD4),
-	PINI(SPDIF_IN,	  AUDIO,   SPDIF,	HDA,	   I2C1,    SDMMC2),
-	PINI(SPDIF_OUT,	  AUDIO,   SPDIF,	RSVD2,	   I2C1,    SDMMC2),
-	PINI(DAP2_FS,	  AUDIO,   I2S1,	HDA,	   RSVD3,   GMI),
-	PINI(DAP2_DIN,	  AUDIO,   I2S1,	HDA,	   RSVD3,   GMI),
-	PINI(DAP2_DOUT,	  AUDIO,   I2S1,	HDA,	   RSVD3,   GMI),
-	PINI(DAP2_SCLK,	  AUDIO,   I2S1,	HDA,	   RSVD3,   GMI),
-	PINI(SPI2_MOSI,	  AUDIO,   SPI6,	SPI2,	   GMI,     GMI),
-	PINI(SPI2_MISO,	  AUDIO,   SPI6,	SPI2,	   GMI,     GMI),
-	PINI(SPI2_CS0_N,  AUDIO,   SPI6,	SPI2,	   GMI,     GMI),
-	PINI(SPI2_SCK,	  AUDIO,   SPI6,	SPI2,	   GMI,     GMI),
-	PINI(SPI1_MOSI,	  AUDIO,   SPI2,	SPI1,	   SPI2_ALT, GMI),
-	PINI(SPI1_SCK,	  AUDIO,   SPI2,	SPI1,	   SPI2_ALT, GMI),
-	PINI(SPI1_CS0_N,  AUDIO,   SPI2,	SPI1,	   SPI2_ALT, GMI),
-	PINI(SPI1_MISO,	  AUDIO,   SPI3,	SPI1,	   SPI2_ALT, RSVD4),
-	PINI(SPI2_CS1_N,  AUDIO,   SPI3,	SPI2,	   SPI2_ALT, I2C1),
-	PINI(SPI2_CS2_N,  AUDIO,   SPI3,	SPI2,	   SPI2_ALT, I2C1),
-	PINI(SDMMC3_CLK,  SDMMC3,  UARTA,	PWM2,	   SDMMC3,  SPI3),
-	PINI(SDMMC3_CMD,  SDMMC3,  UARTA,	PWM3,	   SDMMC3,  SPI2),
-	PINI(SDMMC3_DAT0, SDMMC3,  RSVD1,	RSVD2,	   SDMMC3,  SPI3),
-	PINI(SDMMC3_DAT1, SDMMC3,  RSVD1,	RSVD2,	   SDMMC3,  SPI3),
-	PINI(SDMMC3_DAT2, SDMMC3,  RSVD1,	PWM1,	   SDMMC3,  SPI3),
-	PINI(SDMMC3_DAT3, SDMMC3,  RSVD1,	PWM0,	   SDMMC3,  SPI3),
-	PINI(SDMMC3_DAT4, SDMMC3,  PWM1,	SPI4,	   SDMMC3,  SPI2),
-	PINI(SDMMC3_DAT5, SDMMC3,  PWM0,	SPI4,	   SDMMC3,  SPI2),
-	PINI(SDMMC3_DAT6, SDMMC3,  SPDIF,	SPI4,	   SDMMC3,  SPI2),
-	PINI(SDMMC3_DAT7, SDMMC3,  SPDIF,	SPI4,	   SDMMC3,  SPI2),
-	PINI(PEX_L0_PRSNT_N,	PEXCTL,   PCIE,	HDA,	   RSVD3,   RSVD4),
-	PINI(PEX_L0_RST_N,	PEXCTL,   PCIE,	HDA,	   RSVD3,   RSVD4),
-	PINI(PEX_L0_CLKREQ_N,	PEXCTL,   PCIE,	HDA,	   RSVD3,   RSVD4),
-	PINI(PEX_WAKE_N,	PEXCTL,   PCIE,	HDA,	   RSVD3,   RSVD4),
-	PINI(PEX_L1_PRSNT_N,	PEXCTL,   PCIE,	HDA,	   RSVD3,   RSVD4),
-	PINI(PEX_L1_RST_N,	PEXCTL,   PCIE,	HDA,	   RSVD3,   RSVD4),
-	PINI(PEX_L1_CLKREQ_N,	PEXCTL,   PCIE,	HDA,	   RSVD3,   RSVD4),
-	PINI(PEX_L2_PRSNT_N,	PEXCTL,   PCIE,	HDA,	   RSVD3,   RSVD4),
-	PINI(PEX_L2_RST_N,	PEXCTL,   PCIE,	HDA,	   RSVD3,   RSVD4),
-	PINI(PEX_L2_CLKREQ_N,	PEXCTL,   PCIE,	HDA,	   RSVD3,   RSVD4),
-	PINI(HDMI_CEC,		SYS,      CEC,	RSVD2,	   RSVD3,   RSVD4),
+static const struct pmux_pingrp_desc tegra30_pingroups[] = {
+	/*  pin,                  f0,           f1,       f2,       f3 */
+	/* Offset 0x3000 */
+	PIN(ULPI_DATA0_PO1,       SPI3,         HSI,      UARTA,    ULPI),
+	PIN(ULPI_DATA1_PO2,       SPI3,         HSI,      UARTA,    ULPI),
+	PIN(ULPI_DATA2_PO3,       SPI3,         HSI,      UARTA,    ULPI),
+	PIN(ULPI_DATA3_PO4,       SPI3,         HSI,      UARTA,    ULPI),
+	PIN(ULPI_DATA4_PO5,       SPI2,         HSI,      UARTA,    ULPI),
+	PIN(ULPI_DATA5_PO6,       SPI2,         HSI,      UARTA,    ULPI),
+	PIN(ULPI_DATA6_PO7,       SPI2,         HSI,      UARTA,    ULPI),
+	PIN(ULPI_DATA7_PO0,       SPI2,         HSI,      UARTA,    ULPI),
+	PIN(ULPI_CLK_PY0,         SPI1,         RSVD2,    UARTD,    ULPI),
+	PIN(ULPI_DIR_PY1,         SPI1,         RSVD2,    UARTD,    ULPI),
+	PIN(ULPI_NXT_PY2,         SPI1,         RSVD2,    UARTD,    ULPI),
+	PIN(ULPI_STP_PY3,         SPI1,         RSVD2,    UARTD,    ULPI),
+	PIN(DAP3_FS_PP0,          I2S2,         RSVD2,    DISPLAYA, DISPLAYB),
+	PIN(DAP3_DIN_PP1,         I2S2,         RSVD2,    DISPLAYA, DISPLAYB),
+	PIN(DAP3_DOUT_PP2,        I2S2,         RSVD2,    DISPLAYA, DISPLAYB),
+	PIN(DAP3_SCLK_PP3,        I2S2,         RSVD2,    DISPLAYA, DISPLAYB),
+	PIN(PV0,                  RSVD1,        RSVD2,    RSVD3,    RSVD4),
+	PIN(PV1,                  RSVD1,        RSVD2,    RSVD3,    RSVD4),
+	PIN(SDMMC1_CLK_PZ0,       SDMMC1,       RSVD2,    RSVD3,    UARTA),
+	PIN(SDMMC1_CMD_PZ1,       SDMMC1,       RSVD2,    RSVD3,    UARTA),
+	PIN(SDMMC1_DAT3_PY4,      SDMMC1,       RSVD2,    UARTE,    UARTA),
+	PIN(SDMMC1_DAT2_PY5,      SDMMC1,       RSVD2,    UARTE,    UARTA),
+	PIN(SDMMC1_DAT1_PY6,      SDMMC1,       RSVD2,    UARTE,    UARTA),
+	PIN(SDMMC1_DAT0_PY7,      SDMMC1,       RSVD2,    UARTE,    UARTA),
+	PIN(PV2,                  OWR,          RSVD2,    RSVD3,    RSVD4),
+	PIN(PV3,                  CLK_12M_OUT,  RSVD2,    RSVD3,    RSVD4),
+	PIN(CLK2_OUT_PW5,         EXTPERIPH2,   RSVD2,    RSVD3,    RSVD4),
+	PIN(CLK2_REQ_PCC5,        DAP,          RSVD2,    RSVD3,    RSVD4),
+	PIN(LCD_PWR1_PC1,         DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_PWR2_PC6,         DISPLAYA,     DISPLAYB, SPI5,     HDCP),
+	PIN(LCD_SDIN_PZ2,         DISPLAYA,     DISPLAYB, SPI5,     RSVD4),
+	PIN(LCD_SDOUT_PN5,        DISPLAYA,     DISPLAYB, SPI5,     HDCP),
+	PIN(LCD_WR_N_PZ3,         DISPLAYA,     DISPLAYB, SPI5,     HDCP),
+	PIN(LCD_CS0_N_PN4,        DISPLAYA,     DISPLAYB, SPI5,     RSVD4),
+	PIN(LCD_DC0_PN6,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_SCK_PZ4,          DISPLAYA,     DISPLAYB, SPI5,     HDCP),
+	PIN(LCD_PWR0_PB2,         DISPLAYA,     DISPLAYB, SPI5,     HDCP),
+	PIN(LCD_PCLK_PB3,         DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_DE_PJ1,           DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_HSYNC_PJ3,        DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_VSYNC_PJ4,        DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D0_PE0,           DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D1_PE1,           DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D2_PE2,           DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D3_PE3,           DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D4_PE4,           DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D5_PE5,           DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D6_PE6,           DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D7_PE7,           DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D8_PF0,           DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D9_PF1,           DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D10_PF2,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D11_PF3,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D12_PF4,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D13_PF5,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D14_PF6,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D15_PF7,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D16_PM0,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D17_PM1,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D18_PM2,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D19_PM3,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D20_PM4,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D21_PM5,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D22_PM6,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_D23_PM7,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_CS1_N_PW0,        DISPLAYA,     DISPLAYB, SPI5,     RSVD4),
+	PIN(LCD_M1_PW1,           DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(LCD_DC1_PD2,          DISPLAYA,     DISPLAYB, RSVD3,    RSVD4),
+	PIN(HDMI_INT_PN7,         HDMI,         RSVD2,    RSVD3,    RSVD4),
+	PIN(DDC_SCL_PV4,          I2C4,         RSVD2,    RSVD3,    RSVD4),
+	PIN(DDC_SDA_PV5,          I2C4,         RSVD2,    RSVD3,    RSVD4),
+	PIN(CRT_HSYNC_PV6,        CRT,          RSVD2,    RSVD3,    RSVD4),
+	PIN(CRT_VSYNC_PV7,        CRT,          RSVD2,    RSVD3,    RSVD4),
+	PIN(VI_D0_PT4,            DDR,          RSVD2,    VI,       RSVD4),
+	PIN(VI_D1_PD5,            DDR,          SDMMC2,   VI,       RSVD4),
+	PIN(VI_D2_PL0,            DDR,          SDMMC2,   VI,       RSVD4),
+	PIN(VI_D3_PL1,            DDR,          SDMMC2,   VI,       RSVD4),
+	PIN(VI_D4_PL2,            DDR,          SDMMC2,   VI,       RSVD4),
+	PIN(VI_D5_PL3,            DDR,          SDMMC2,   VI,       RSVD4),
+	PIN(VI_D6_PL4,            DDR,          SDMMC2,   VI,       RSVD4),
+	PIN(VI_D7_PL5,            DDR,          SDMMC2,   VI,       RSVD4),
+	PIN(VI_D8_PL6,            DDR,          SDMMC2,   VI,       RSVD4),
+	PIN(VI_D9_PL7,            DDR,          SDMMC2,   VI,       RSVD4),
+	PIN(VI_D10_PT2,           DDR,          RSVD2,    VI,       RSVD4),
+	PIN(VI_D11_PT3,           DDR,          RSVD2,    VI,       RSVD4),
+	PIN(VI_PCLK_PT0,          RSVD1,        SDMMC2,   VI,       RSVD4),
+	PIN(VI_MCLK_PT1,          VI,           VI_ALT1,  VI_ALT2,  VI_ALT3),
+	PIN(VI_VSYNC_PD6,         DDR,          RSVD2,    VI,       RSVD4),
+	PIN(VI_HSYNC_PD7,         DDR,          RSVD2,    VI,       RSVD4),
+	PIN(UART2_RXD_PC3,        UARTB,        SPDIF,    UARTA,    SPI4),
+	PIN(UART2_TXD_PC2,        UARTB,        SPDIF,    UARTA,    SPI4),
+	PIN(UART2_RTS_N_PJ6,      UARTA,        UARTB,    GMI,      SPI4),
+	PIN(UART2_CTS_N_PJ5,      UARTA,        UARTB,    GMI,      SPI4),
+	PIN(UART3_TXD_PW6,        UARTC,        RSVD2,    GMI,      RSVD4),
+	PIN(UART3_RXD_PW7,        UARTC,        RSVD2,    GMI,      RSVD4),
+	PIN(UART3_CTS_N_PA1,      UARTC,        RSVD2,    GMI,      RSVD4),
+	PIN(UART3_RTS_N_PC0,      UARTC,        PWM0,     GMI,      RSVD4),
+	PIN(PU0,                  OWR,          UARTA,    GMI,      RSVD4),
+	PIN(PU1,                  RSVD1,        UARTA,    GMI,      RSVD4),
+	PIN(PU2,                  RSVD1,        UARTA,    GMI,      RSVD4),
+	PIN(PU3,                  PWM0,         UARTA,    GMI,      RSVD4),
+	PIN(PU4,                  PWM1,         UARTA,    GMI,      RSVD4),
+	PIN(PU5,                  PWM2,         UARTA,    GMI,      RSVD4),
+	PIN(PU6,                  PWM3,         UARTA,    GMI,      RSVD4),
+	PIN(GEN1_I2C_SDA_PC5,     I2C1,         RSVD2,    RSVD3,    RSVD4),
+	PIN(GEN1_I2C_SCL_PC4,     I2C1,         RSVD2,    RSVD3,    RSVD4),
+	PIN(DAP4_FS_PP4,          I2S3,         RSVD2,    GMI,      RSVD4),
+	PIN(DAP4_DIN_PP5,         I2S3,         RSVD2,    GMI,      RSVD4),
+	PIN(DAP4_DOUT_PP6,        I2S3,         RSVD2,    GMI,      RSVD4),
+	PIN(DAP4_SCLK_PP7,        I2S3,         RSVD2,    GMI,      RSVD4),
+	PIN(CLK3_OUT_PEE0,        EXTPERIPH3,   RSVD2,    RSVD3,    RSVD4),
+	PIN(CLK3_REQ_PEE1,        DEV3,         RSVD2,    RSVD3,    RSVD4),
+	PIN(GMI_WP_N_PC7,         RSVD1,        NAND,     GMI,      GMI_ALT),
+	PIN(GMI_IORDY_PI5,        RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_WAIT_PI7,         RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_ADV_N_PK0,        RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_CLK_PK1,          RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_CS0_N_PJ0,        RSVD1,        NAND,     GMI,      DTV),
+	PIN(GMI_CS1_N_PJ2,        RSVD1,        NAND,     GMI,      DTV),
+	PIN(GMI_CS2_N_PK3,        RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_CS3_N_PK4,        RSVD1,        NAND,     GMI,      GMI_ALT),
+	PIN(GMI_CS4_N_PK2,        RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_CS6_N_PI3,        NAND,         NAND_ALT, GMI,      SATA),
+	PIN(GMI_CS7_N_PI6,        NAND,         NAND_ALT, GMI,      GMI_ALT),
+	PIN(GMI_AD0_PG0,          RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_AD1_PG1,          RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_AD2_PG2,          RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_AD3_PG3,          RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_AD4_PG4,          RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_AD5_PG5,          RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_AD6_PG6,          RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_AD7_PG7,          RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_AD8_PH0,          PWM0,         NAND,     GMI,      RSVD4),
+	PIN(GMI_AD9_PH1,          PWM1,         NAND,     GMI,      RSVD4),
+	PIN(GMI_AD10_PH2,         PWM2,         NAND,     GMI,      RSVD4),
+	PIN(GMI_AD11_PH3,         PWM3,         NAND,     GMI,      RSVD4),
+	PIN(GMI_AD12_PH4,         RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_AD13_PH5,         RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_AD14_PH6,         RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_AD15_PH7,         RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_A16_PJ7,          UARTD,        SPI4,     GMI,      GMI_ALT),
+	PIN(GMI_A17_PB0,          UARTD,        SPI4,     GMI,      DTV),
+	PIN(GMI_A18_PB1,          UARTD,        SPI4,     GMI,      DTV),
+	PIN(GMI_A19_PK7,          UARTD,        SPI4,     GMI,      RSVD4),
+	PIN(GMI_WR_N_PI0,         RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_OE_N_PI1,         RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_DQS_PI2,          RSVD1,        NAND,     GMI,      RSVD4),
+	PIN(GMI_RST_N_PI4,        NAND,         NAND_ALT, GMI,      RSVD4),
+	PIN(GEN2_I2C_SCL_PT5,     I2C2,         HDCP,     GMI,      RSVD4),
+	PIN(GEN2_I2C_SDA_PT6,     I2C2,         HDCP,     GMI,      RSVD4),
+	PIN(SDMMC4_CLK_PCC4,      INVALID,      NAND,     GMI,      SDMMC4),
+	PIN(SDMMC4_CMD_PT7,       I2C3,         NAND,     GMI,      SDMMC4),
+	PIN(SDMMC4_DAT0_PAA0,     UARTE,        SPI3,     GMI,      SDMMC4),
+	PIN(SDMMC4_DAT1_PAA1,     UARTE,        SPI3,     GMI,      SDMMC4),
+	PIN(SDMMC4_DAT2_PAA2,     UARTE,        SPI3,     GMI,      SDMMC4),
+	PIN(SDMMC4_DAT3_PAA3,     UARTE,        SPI3,     GMI,      SDMMC4),
+	PIN(SDMMC4_DAT4_PAA4,     I2C3,         I2S4,     GMI,      SDMMC4),
+	PIN(SDMMC4_DAT5_PAA5,     VGP3,         I2S4,     GMI,      SDMMC4),
+	PIN(SDMMC4_DAT6_PAA6,     VGP4,         I2S4,     GMI,      SDMMC4),
+	PIN(SDMMC4_DAT7_PAA7,     VGP5,         I2S4,     GMI,      SDMMC4),
+	PIN(SDMMC4_RST_N_PCC3,    VGP6,         RSVD2,    RSVD3,    SDMMC4),
+	PIN(CAM_MCLK_PCC0,        VI,           VI_ALT1,  VI_ALT3,  SDMMC4),
+	PIN(PCC1,                 I2S4,         RSVD2,    RSVD3,    SDMMC4),
+	PIN(PBB0,                 I2S4,         RSVD2,    RSVD3,    SDMMC4),
+	PIN(CAM_I2C_SCL_PBB1,     VGP1,         I2C3,     RSVD3,    SDMMC4),
+	PIN(CAM_I2C_SDA_PBB2,     VGP2,         I2C3,     RSVD3,    SDMMC4),
+	PIN(PBB3,                 VGP3,         DISPLAYA, DISPLAYB, SDMMC4),
+	PIN(PBB4,                 VGP4,         DISPLAYA, DISPLAYB, SDMMC4),
+	PIN(PBB5,                 VGP5,         DISPLAYA, DISPLAYB, SDMMC4),
+	PIN(PBB6,                 VGP6,         DISPLAYA, DISPLAYB, SDMMC4),
+	PIN(PBB7,                 I2S4,         RSVD2,    RSVD3,    SDMMC4),
+	PIN(PCC2,                 I2S4,         RSVD2,    RSVD3,    RSVD4),
+	PIN(JTAG_RTCK_PU7,        RTCK,         RSVD2,    RSVD3,    RSVD4),
+	PIN(PWR_I2C_SCL_PZ6,      I2CPWR,       RSVD2,    RSVD3,    RSVD4),
+	PIN(PWR_I2C_SDA_PZ7,      I2CPWR,       RSVD2,    RSVD3,    RSVD4),
+	PIN(KB_ROW0_PR0,          KBC,          NAND,     RSVD3,    RSVD4),
+	PIN(KB_ROW1_PR1,          KBC,          NAND,     RSVD3,    RSVD4),
+	PIN(KB_ROW2_PR2,          KBC,          NAND,     RSVD3,    RSVD4),
+	PIN(KB_ROW3_PR3,          KBC,          NAND,     RSVD3,    INVALID),
+	PIN(KB_ROW4_PR4,          KBC,          NAND,     TRACE,    RSVD4),
+	PIN(KB_ROW5_PR5,          KBC,          NAND,     TRACE,    OWR),
+	PIN(KB_ROW6_PR6,          KBC,          NAND,     SDMMC2,   MIO),
+	PIN(KB_ROW7_PR7,          KBC,          NAND,     SDMMC2,   MIO),
+	PIN(KB_ROW8_PS0,          KBC,          NAND,     SDMMC2,   MIO),
+	PIN(KB_ROW9_PS1,          KBC,          NAND,     SDMMC2,   MIO),
+	PIN(KB_ROW10_PS2,         KBC,          NAND,     SDMMC2,   MIO),
+	PIN(KB_ROW11_PS3,         KBC,          NAND,     SDMMC2,   MIO),
+	PIN(KB_ROW12_PS4,         KBC,          NAND,     SDMMC2,   MIO),
+	PIN(KB_ROW13_PS5,         KBC,          NAND,     SDMMC2,   MIO),
+	PIN(KB_ROW14_PS6,         KBC,          NAND,     SDMMC2,   MIO),
+	PIN(KB_ROW15_PS7,         KBC,          NAND,     SDMMC2,   MIO),
+	PIN(KB_COL0_PQ0,          KBC,          NAND,     TRACE,    TEST),
+	PIN(KB_COL1_PQ1,          KBC,          NAND,     TRACE,    TEST),
+	PIN(KB_COL2_PQ2,          KBC,          NAND,     TRACE,    RSVD4),
+	PIN(KB_COL3_PQ3,          KBC,          NAND,     TRACE,    RSVD4),
+	PIN(KB_COL4_PQ4,          KBC,          NAND,     TRACE,    RSVD4),
+	PIN(KB_COL5_PQ5,          KBC,          NAND,     TRACE,    RSVD4),
+	PIN(KB_COL6_PQ6,          KBC,          NAND,     TRACE,    MIO),
+	PIN(KB_COL7_PQ7,          KBC,          NAND,     TRACE,    MIO),
+	PIN(CLK_32K_OUT_PA0,      BLINK,        RSVD2,    RSVD3,    RSVD4),
+	PIN(SYS_CLK_REQ_PZ5,      SYSCLK,       RSVD2,    RSVD3,    RSVD4),
+	PIN(CORE_PWR_REQ,         CORE_PWR_REQ, RSVD2,    RSVD3,    RSVD4),
+	PIN(CPU_PWR_REQ,          CPU_PWR_REQ,  RSVD2,    RSVD3,    RSVD4),
+	PIN(PWR_INT_N,            PWR_INT_N,    RSVD2,    RSVD3,    RSVD4),
+	PIN(CLK_32K_IN,           CLK_32K_IN,   RSVD2,    RSVD3,    RSVD4),
+	PIN(OWR,                  OWR,          CEC,      RSVD3,    RSVD4),
+	PIN(DAP1_FS_PN0,          I2S0,         HDA,      GMI,      SDMMC2),
+	PIN(DAP1_DIN_PN1,         I2S0,         HDA,      GMI,      SDMMC2),
+	PIN(DAP1_DOUT_PN2,        I2S0,         HDA,      GMI,      SDMMC2),
+	PIN(DAP1_SCLK_PN3,        I2S0,         HDA,      GMI,      SDMMC2),
+	PIN(CLK1_REQ_PEE2,        DAP,          HDA,      RSVD3,    RSVD4),
+	PIN(CLK1_OUT_PW4,         EXTPERIPH1,   RSVD2,    RSVD3,    RSVD4),
+	PIN(SPDIF_IN_PK6,         SPDIF,        HDA,      I2C1,     SDMMC2),
+	PIN(SPDIF_OUT_PK5,        SPDIF,        RSVD2,    I2C1,     SDMMC2),
+	PIN(DAP2_FS_PA2,          I2S1,         HDA,      RSVD3,    GMI),
+	PIN(DAP2_DIN_PA4,         I2S1,         HDA,      RSVD3,    GMI),
+	PIN(DAP2_DOUT_PA5,        I2S1,         HDA,      RSVD3,    GMI),
+	PIN(DAP2_SCLK_PA3,        I2S1,         HDA,      RSVD3,    GMI),
+	PIN(SPI2_MOSI_PX0,        SPI6,         SPI2,     SPI3,     GMI),
+	PIN(SPI2_MISO_PX1,        SPI6,         SPI2,     SPI3,     GMI),
+	PIN(SPI2_CS0_N_PX3,       SPI6,         SPI2,     SPI3,     GMI),
+	PIN(SPI2_SCK_PX2,         SPI6,         SPI2,     SPI3,     GMI),
+	PIN(SPI1_MOSI_PX4,        SPI2,         SPI1,     SPI2_ALT, GMI),
+	PIN(SPI1_SCK_PX5,         SPI2,         SPI1,     SPI2_ALT, GMI),
+	PIN(SPI1_CS0_N_PX6,       SPI2,         SPI1,     SPI2_ALT, GMI),
+	PIN(SPI1_MISO_PX7,        SPI3,         SPI1,     SPI2_ALT, RSVD4),
+	PIN(SPI2_CS1_N_PW2,       SPI3,         SPI2,     SPI2_ALT, I2C1),
+	PIN(SPI2_CS2_N_PW3,       SPI3,         SPI2,     SPI2_ALT, I2C1),
+	PIN(SDMMC3_CLK_PA6,       UARTA,        PWM2,     SDMMC3,   SPI3),
+	PIN(SDMMC3_CMD_PA7,       UARTA,        PWM3,     SDMMC3,   SPI2),
+	PIN(SDMMC3_DAT0_PB7,      RSVD1,        RSVD2,    SDMMC3,   SPI3),
+	PIN(SDMMC3_DAT1_PB6,      RSVD1,        RSVD2,    SDMMC3,   SPI3),
+	PIN(SDMMC3_DAT2_PB5,      RSVD1,        PWM1,     SDMMC3,   SPI3),
+	PIN(SDMMC3_DAT3_PB4,      RSVD1,        PWM0,     SDMMC3,   SPI3),
+	PIN(SDMMC3_DAT4_PD1,      PWM1,         SPI4,     SDMMC3,   SPI2),
+	PIN(SDMMC3_DAT5_PD0,      PWM0,         SPI4,     SDMMC3,   SPI2),
+	PIN(SDMMC3_DAT6_PD3,      SPDIF,        SPI4,     SDMMC3,   SPI2),
+	PIN(SDMMC3_DAT7_PD4,      SPDIF,        SPI4,     SDMMC3,   SPI2),
+	PIN(PEX_L0_PRSNT_N_PDD0,  PCIE,         HDA,      RSVD3,    RSVD4),
+	PIN(PEX_L0_RST_N_PDD1,    PCIE,         HDA,      RSVD3,    RSVD4),
+	PIN(PEX_L0_CLKREQ_N_PDD2, PCIE,         HDA,      RSVD3,    RSVD4),
+	PIN(PEX_WAKE_N_PDD3,      PCIE,         HDA,      RSVD3,    RSVD4),
+	PIN(PEX_L1_PRSNT_N_PDD4,  PCIE,         HDA,      RSVD3,    RSVD4),
+	PIN(PEX_L1_RST_N_PDD5,    PCIE,         HDA,      RSVD3,    RSVD4),
+	PIN(PEX_L1_CLKREQ_N_PDD6, PCIE,         HDA,      RSVD3,    RSVD4),
+	PIN(PEX_L2_PRSNT_N_PDD7,  PCIE,         HDA,      RSVD3,    RSVD4),
+	PIN(PEX_L2_RST_N_PCC6,    PCIE,         HDA,      RSVD3,    RSVD4),
+	PIN(PEX_L2_CLKREQ_N_PCC7, PCIE,         HDA,      RSVD3,    RSVD4),
+	PIN(HDMI_CEC_PEE3,        CEC,          RSVD2,    RSVD3,    RSVD4),
 };
 const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra30_pingroups;
diff --git a/arch/arm/include/asm/arch-tegra30/pinmux.h b/arch/arm/include/asm/arch-tegra30/pinmux.h
index 0112e35..3fed194 100644
--- a/arch/arm/include/asm/arch-tegra30/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra30/pinmux.h
@@ -1,446 +1,389 @@
 /*
- * Copyright (c) 2010-2013, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2010-2014, NVIDIA CORPORATION. All rights reserved.
  *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ * SPDX-License-Identifier: GPL-2.0+
  */
 
 #ifndef _TEGRA30_PINMUX_H_
 #define _TEGRA30_PINMUX_H_
 
-/*
- * Pin groups which we adjust. There are three basic attributes of each pin
- * group which use this enum:
- *
- *	- function
- *	- pullup / pulldown
- *	- tristate or normal
- */
 enum pmux_pingrp {
-	PINGRP_ULPI_DATA0 = 0,  /* offset 0x3000 */
-	PINGRP_ULPI_DATA1,
-	PINGRP_ULPI_DATA2,
-	PINGRP_ULPI_DATA3,
-	PINGRP_ULPI_DATA4,
-	PINGRP_ULPI_DATA5,
-	PINGRP_ULPI_DATA6,
-	PINGRP_ULPI_DATA7,
-	PINGRP_ULPI_CLK,
-	PINGRP_ULPI_DIR,
-	PINGRP_ULPI_NXT,
-	PINGRP_ULPI_STP,
-	PINGRP_DAP3_FS,
-	PINGRP_DAP3_DIN,
-	PINGRP_DAP3_DOUT,
-	PINGRP_DAP3_SCLK,
-	PINGRP_GPIO_PV0,
-	PINGRP_GPIO_PV1,
-	PINGRP_SDMMC1_CLK,
-	PINGRP_SDMMC1_CMD,
-	PINGRP_SDMMC1_DAT3,
-	PINGRP_SDMMC1_DAT2,
-	PINGRP_SDMMC1_DAT1,
-	PINGRP_SDMMC1_DAT0,
-	PINGRP_GPIO_PV2,
-	PINGRP_GPIO_PV3,
-	PINGRP_CLK2_OUT,
-	PINGRP_CLK2_REQ,
-	PINGRP_LCD_PWR1,
-	PINGRP_LCD_PWR2,
-	PINGRP_LCD_SDIN,
-	PINGRP_LCD_SDOUT,
-	PINGRP_LCD_WR_N,
-	PINGRP_LCD_CS0_N,
-	PINGRP_LCD_DC0,
-	PINGRP_LCD_SCK,
-	PINGRP_LCD_PWR0,
-	PINGRP_LCD_PCLK,
-	PINGRP_LCD_DE,
-	PINGRP_LCD_HSYNC,
-	PINGRP_LCD_VSYNC,
-	PINGRP_LCD_D0,
-	PINGRP_LCD_D1,
-	PINGRP_LCD_D2,
-	PINGRP_LCD_D3,
-	PINGRP_LCD_D4,
-	PINGRP_LCD_D5,
-	PINGRP_LCD_D6,
-	PINGRP_LCD_D7,
-	PINGRP_LCD_D8,
-	PINGRP_LCD_D9,
-	PINGRP_LCD_D10,
-	PINGRP_LCD_D11,
-	PINGRP_LCD_D12,
-	PINGRP_LCD_D13,
-	PINGRP_LCD_D14,
-	PINGRP_LCD_D15,
-	PINGRP_LCD_D16,
-	PINGRP_LCD_D17,
-	PINGRP_LCD_D18,
-	PINGRP_LCD_D19,
-	PINGRP_LCD_D20,
-	PINGRP_LCD_D21,
-	PINGRP_LCD_D22,
-	PINGRP_LCD_D23,
-	PINGRP_LCD_CS1_N,
-	PINGRP_LCD_M1,
-	PINGRP_LCD_DC1,
-	PINGRP_HDMI_INT,
-	PINGRP_DDC_SCL,
-	PINGRP_DDC_SDA,
-	PINGRP_CRT_HSYNC,
-	PINGRP_CRT_VSYNC,
-	PINGRP_VI_D0,
-	PINGRP_VI_D1,
-	PINGRP_VI_D2,
-	PINGRP_VI_D3,
-	PINGRP_VI_D4,
-	PINGRP_VI_D5,
-	PINGRP_VI_D6,
-	PINGRP_VI_D7,
-	PINGRP_VI_D8,
-	PINGRP_VI_D9,
-	PINGRP_VI_D10,
-	PINGRP_VI_D11,
-	PINGRP_VI_PCLK,
-	PINGRP_VI_MCLK,
-	PINGRP_VI_VSYNC,
-	PINGRP_VI_HSYNC,
-	PINGRP_UART2_RXD,
-	PINGRP_UART2_TXD,
-	PINGRP_UART2_RTS_N,
-	PINGRP_UART2_CTS_N,
-	PINGRP_UART3_TXD,
-	PINGRP_UART3_RXD,
-	PINGRP_UART3_CTS_N,
-	PINGRP_UART3_RTS_N,
-	PINGRP_GPIO_PU0,
-	PINGRP_GPIO_PU1,
-	PINGRP_GPIO_PU2,
-	PINGRP_GPIO_PU3,
-	PINGRP_GPIO_PU4,
-	PINGRP_GPIO_PU5,
-	PINGRP_GPIO_PU6,
-	PINGRP_GEN1_I2C_SDA,
-	PINGRP_GEN1_I2C_SCL,
-	PINGRP_DAP4_FS,
-	PINGRP_DAP4_DIN,
-	PINGRP_DAP4_DOUT,
-	PINGRP_DAP4_SCLK,
-	PINGRP_CLK3_OUT,
-	PINGRP_CLK3_REQ,
-	PINGRP_GMI_WP_N,
-	PINGRP_GMI_IORDY,
-	PINGRP_GMI_WAIT,
-	PINGRP_GMI_ADV_N,
-	PINGRP_GMI_CLK,
-	PINGRP_GMI_CS0_N,
-	PINGRP_GMI_CS1_N,
-	PINGRP_GMI_CS2_N,
-	PINGRP_GMI_CS3_N,
-	PINGRP_GMI_CS4_N,
-	PINGRP_GMI_CS6_N,
-	PINGRP_GMI_CS7_N,
-	PINGRP_GMI_AD0,
-	PINGRP_GMI_AD1,
-	PINGRP_GMI_AD2,
-	PINGRP_GMI_AD3,
-	PINGRP_GMI_AD4,
-	PINGRP_GMI_AD5,
-	PINGRP_GMI_AD6,
-	PINGRP_GMI_AD7,
-	PINGRP_GMI_AD8,
-	PINGRP_GMI_AD9,
-	PINGRP_GMI_AD10,
-	PINGRP_GMI_AD11,
-	PINGRP_GMI_AD12,
-	PINGRP_GMI_AD13,
-	PINGRP_GMI_AD14,
-	PINGRP_GMI_AD15,
-	PINGRP_GMI_A16,
-	PINGRP_GMI_A17,
-	PINGRP_GMI_A18,
-	PINGRP_GMI_A19,
-	PINGRP_GMI_WR_N,
-	PINGRP_GMI_OE_N,
-	PINGRP_GMI_DQS,
-	PINGRP_GMI_RST_N,
-	PINGRP_GEN2_I2C_SCL,
-	PINGRP_GEN2_I2C_SDA,
-	PINGRP_SDMMC4_CLK,
-	PINGRP_SDMMC4_CMD,
-	PINGRP_SDMMC4_DAT0,
-	PINGRP_SDMMC4_DAT1,
-	PINGRP_SDMMC4_DAT2,
-	PINGRP_SDMMC4_DAT3,
-	PINGRP_SDMMC4_DAT4,
-	PINGRP_SDMMC4_DAT5,
-	PINGRP_SDMMC4_DAT6,
-	PINGRP_SDMMC4_DAT7,
-	PINGRP_SDMMC4_RST_N,
-	PINGRP_CAM_MCLK,
-	PINGRP_GPIO_PCC1,
-	PINGRP_GPIO_PBB0,
-	PINGRP_CAM_I2C_SCL,
-	PINGRP_CAM_I2C_SDA,
-	PINGRP_GPIO_PBB3,
-	PINGRP_GPIO_PBB4,
-	PINGRP_GPIO_PBB5,
-	PINGRP_GPIO_PBB6,
-	PINGRP_GPIO_PBB7,
-	PINGRP_GPIO_PCC2,
-	PINGRP_JTAG_RTCK,
-	PINGRP_PWR_I2C_SCL,
-	PINGRP_PWR_I2C_SDA,
-	PINGRP_KB_ROW0,
-	PINGRP_KB_ROW1,
-	PINGRP_KB_ROW2,
-	PINGRP_KB_ROW3,
-	PINGRP_KB_ROW4,
-	PINGRP_KB_ROW5,
-	PINGRP_KB_ROW6,
-	PINGRP_KB_ROW7,
-	PINGRP_KB_ROW8,
-	PINGRP_KB_ROW9,
-	PINGRP_KB_ROW10,
-	PINGRP_KB_ROW11,
-	PINGRP_KB_ROW12,
-	PINGRP_KB_ROW13,
-	PINGRP_KB_ROW14,
-	PINGRP_KB_ROW15,
-	PINGRP_KB_COL0,
-	PINGRP_KB_COL1,
-	PINGRP_KB_COL2,
-	PINGRP_KB_COL3,
-	PINGRP_KB_COL4,
-	PINGRP_KB_COL5,
-	PINGRP_KB_COL6,
-	PINGRP_KB_COL7,
-	PINGRP_CLK_32K_OUT,
-	PINGRP_SYS_CLK_REQ,
-	PINGRP_CORE_PWR_REQ,
-	PINGRP_CPU_PWR_REQ,
-	PINGRP_PWR_INT_N,
-	PINGRP_CLK_32K_IN,
-	PINGRP_OWR,
-	PINGRP_DAP1_FS,
-	PINGRP_DAP1_DIN,
-	PINGRP_DAP1_DOUT,
-	PINGRP_DAP1_SCLK,
-	PINGRP_CLK1_REQ,
-	PINGRP_CLK1_OUT,
-	PINGRP_SPDIF_IN,
-	PINGRP_SPDIF_OUT,
-	PINGRP_DAP2_FS,
-	PINGRP_DAP2_DIN,
-	PINGRP_DAP2_DOUT,
-	PINGRP_DAP2_SCLK,
-	PINGRP_SPI2_MOSI,
-	PINGRP_SPI2_MISO,
-	PINGRP_SPI2_CS0_N,
-	PINGRP_SPI2_SCK,
-	PINGRP_SPI1_MOSI,
-	PINGRP_SPI1_SCK,
-	PINGRP_SPI1_CS0_N,
-	PINGRP_SPI1_MISO,
-	PINGRP_SPI2_CS1_N,
-	PINGRP_SPI2_CS2_N,
-	PINGRP_SDMMC3_CLK,
-	PINGRP_SDMMC3_CMD,
-	PINGRP_SDMMC3_DAT0,
-	PINGRP_SDMMC3_DAT1,
-	PINGRP_SDMMC3_DAT2,
-	PINGRP_SDMMC3_DAT3,
-	PINGRP_SDMMC3_DAT4,
-	PINGRP_SDMMC3_DAT5,
-	PINGRP_SDMMC3_DAT6,
-	PINGRP_SDMMC3_DAT7,
-	PINGRP_PEX_L0_PRSNT_N,
-	PINGRP_PEX_L0_RST_N,
-	PINGRP_PEX_L0_CLKREQ_N,
-	PINGRP_PEX_WAKE_N,
-	PINGRP_PEX_L1_PRSNT_N,
-	PINGRP_PEX_L1_RST_N,
-	PINGRP_PEX_L1_CLKREQ_N,
-	PINGRP_PEX_L2_PRSNT_N,
-	PINGRP_PEX_L2_RST_N,
-	PINGRP_PEX_L2_CLKREQ_N,
-	PINGRP_HDMI_CEC,	/* offset 0x33e0 */
+	PMUX_PINGRP_ULPI_DATA0_PO1,
+	PMUX_PINGRP_ULPI_DATA1_PO2,
+	PMUX_PINGRP_ULPI_DATA2_PO3,
+	PMUX_PINGRP_ULPI_DATA3_PO4,
+	PMUX_PINGRP_ULPI_DATA4_PO5,
+	PMUX_PINGRP_ULPI_DATA5_PO6,
+	PMUX_PINGRP_ULPI_DATA6_PO7,
+	PMUX_PINGRP_ULPI_DATA7_PO0,
+	PMUX_PINGRP_ULPI_CLK_PY0,
+	PMUX_PINGRP_ULPI_DIR_PY1,
+	PMUX_PINGRP_ULPI_NXT_PY2,
+	PMUX_PINGRP_ULPI_STP_PY3,
+	PMUX_PINGRP_DAP3_FS_PP0,
+	PMUX_PINGRP_DAP3_DIN_PP1,
+	PMUX_PINGRP_DAP3_DOUT_PP2,
+	PMUX_PINGRP_DAP3_SCLK_PP3,
+	PMUX_PINGRP_PV0,
+	PMUX_PINGRP_PV1,
+	PMUX_PINGRP_SDMMC1_CLK_PZ0,
+	PMUX_PINGRP_SDMMC1_CMD_PZ1,
+	PMUX_PINGRP_SDMMC1_DAT3_PY4,
+	PMUX_PINGRP_SDMMC1_DAT2_PY5,
+	PMUX_PINGRP_SDMMC1_DAT1_PY6,
+	PMUX_PINGRP_SDMMC1_DAT0_PY7,
+	PMUX_PINGRP_PV2,
+	PMUX_PINGRP_PV3,
+	PMUX_PINGRP_CLK2_OUT_PW5,
+	PMUX_PINGRP_CLK2_REQ_PCC5,
+	PMUX_PINGRP_LCD_PWR1_PC1,
+	PMUX_PINGRP_LCD_PWR2_PC6,
+	PMUX_PINGRP_LCD_SDIN_PZ2,
+	PMUX_PINGRP_LCD_SDOUT_PN5,
+	PMUX_PINGRP_LCD_WR_N_PZ3,
+	PMUX_PINGRP_LCD_CS0_N_PN4,
+	PMUX_PINGRP_LCD_DC0_PN6,
+	PMUX_PINGRP_LCD_SCK_PZ4,
+	PMUX_PINGRP_LCD_PWR0_PB2,
+	PMUX_PINGRP_LCD_PCLK_PB3,
+	PMUX_PINGRP_LCD_DE_PJ1,
+	PMUX_PINGRP_LCD_HSYNC_PJ3,
+	PMUX_PINGRP_LCD_VSYNC_PJ4,
+	PMUX_PINGRP_LCD_D0_PE0,
+	PMUX_PINGRP_LCD_D1_PE1,
+	PMUX_PINGRP_LCD_D2_PE2,
+	PMUX_PINGRP_LCD_D3_PE3,
+	PMUX_PINGRP_LCD_D4_PE4,
+	PMUX_PINGRP_LCD_D5_PE5,
+	PMUX_PINGRP_LCD_D6_PE6,
+	PMUX_PINGRP_LCD_D7_PE7,
+	PMUX_PINGRP_LCD_D8_PF0,
+	PMUX_PINGRP_LCD_D9_PF1,
+	PMUX_PINGRP_LCD_D10_PF2,
+	PMUX_PINGRP_LCD_D11_PF3,
+	PMUX_PINGRP_LCD_D12_PF4,
+	PMUX_PINGRP_LCD_D13_PF5,
+	PMUX_PINGRP_LCD_D14_PF6,
+	PMUX_PINGRP_LCD_D15_PF7,
+	PMUX_PINGRP_LCD_D16_PM0,
+	PMUX_PINGRP_LCD_D17_PM1,
+	PMUX_PINGRP_LCD_D18_PM2,
+	PMUX_PINGRP_LCD_D19_PM3,
+	PMUX_PINGRP_LCD_D20_PM4,
+	PMUX_PINGRP_LCD_D21_PM5,
+	PMUX_PINGRP_LCD_D22_PM6,
+	PMUX_PINGRP_LCD_D23_PM7,
+	PMUX_PINGRP_LCD_CS1_N_PW0,
+	PMUX_PINGRP_LCD_M1_PW1,
+	PMUX_PINGRP_LCD_DC1_PD2,
+	PMUX_PINGRP_HDMI_INT_PN7,
+	PMUX_PINGRP_DDC_SCL_PV4,
+	PMUX_PINGRP_DDC_SDA_PV5,
+	PMUX_PINGRP_CRT_HSYNC_PV6,
+	PMUX_PINGRP_CRT_VSYNC_PV7,
+	PMUX_PINGRP_VI_D0_PT4,
+	PMUX_PINGRP_VI_D1_PD5,
+	PMUX_PINGRP_VI_D2_PL0,
+	PMUX_PINGRP_VI_D3_PL1,
+	PMUX_PINGRP_VI_D4_PL2,
+	PMUX_PINGRP_VI_D5_PL3,
+	PMUX_PINGRP_VI_D6_PL4,
+	PMUX_PINGRP_VI_D7_PL5,
+	PMUX_PINGRP_VI_D8_PL6,
+	PMUX_PINGRP_VI_D9_PL7,
+	PMUX_PINGRP_VI_D10_PT2,
+	PMUX_PINGRP_VI_D11_PT3,
+	PMUX_PINGRP_VI_PCLK_PT0,
+	PMUX_PINGRP_VI_MCLK_PT1,
+	PMUX_PINGRP_VI_VSYNC_PD6,
+	PMUX_PINGRP_VI_HSYNC_PD7,
+	PMUX_PINGRP_UART2_RXD_PC3,
+	PMUX_PINGRP_UART2_TXD_PC2,
+	PMUX_PINGRP_UART2_RTS_N_PJ6,
+	PMUX_PINGRP_UART2_CTS_N_PJ5,
+	PMUX_PINGRP_UART3_TXD_PW6,
+	PMUX_PINGRP_UART3_RXD_PW7,
+	PMUX_PINGRP_UART3_CTS_N_PA1,
+	PMUX_PINGRP_UART3_RTS_N_PC0,
+	PMUX_PINGRP_PU0,
+	PMUX_PINGRP_PU1,
+	PMUX_PINGRP_PU2,
+	PMUX_PINGRP_PU3,
+	PMUX_PINGRP_PU4,
+	PMUX_PINGRP_PU5,
+	PMUX_PINGRP_PU6,
+	PMUX_PINGRP_GEN1_I2C_SDA_PC5,
+	PMUX_PINGRP_GEN1_I2C_SCL_PC4,
+	PMUX_PINGRP_DAP4_FS_PP4,
+	PMUX_PINGRP_DAP4_DIN_PP5,
+	PMUX_PINGRP_DAP4_DOUT_PP6,
+	PMUX_PINGRP_DAP4_SCLK_PP7,
+	PMUX_PINGRP_CLK3_OUT_PEE0,
+	PMUX_PINGRP_CLK3_REQ_PEE1,
+	PMUX_PINGRP_GMI_WP_N_PC7,
+	PMUX_PINGRP_GMI_IORDY_PI5,
+	PMUX_PINGRP_GMI_WAIT_PI7,
+	PMUX_PINGRP_GMI_ADV_N_PK0,
+	PMUX_PINGRP_GMI_CLK_PK1,
+	PMUX_PINGRP_GMI_CS0_N_PJ0,
+	PMUX_PINGRP_GMI_CS1_N_PJ2,
+	PMUX_PINGRP_GMI_CS2_N_PK3,
+	PMUX_PINGRP_GMI_CS3_N_PK4,
+	PMUX_PINGRP_GMI_CS4_N_PK2,
+	PMUX_PINGRP_GMI_CS6_N_PI3,
+	PMUX_PINGRP_GMI_CS7_N_PI6,
+	PMUX_PINGRP_GMI_AD0_PG0,
+	PMUX_PINGRP_GMI_AD1_PG1,
+	PMUX_PINGRP_GMI_AD2_PG2,
+	PMUX_PINGRP_GMI_AD3_PG3,
+	PMUX_PINGRP_GMI_AD4_PG4,
+	PMUX_PINGRP_GMI_AD5_PG5,
+	PMUX_PINGRP_GMI_AD6_PG6,
+	PMUX_PINGRP_GMI_AD7_PG7,
+	PMUX_PINGRP_GMI_AD8_PH0,
+	PMUX_PINGRP_GMI_AD9_PH1,
+	PMUX_PINGRP_GMI_AD10_PH2,
+	PMUX_PINGRP_GMI_AD11_PH3,
+	PMUX_PINGRP_GMI_AD12_PH4,
+	PMUX_PINGRP_GMI_AD13_PH5,
+	PMUX_PINGRP_GMI_AD14_PH6,
+	PMUX_PINGRP_GMI_AD15_PH7,
+	PMUX_PINGRP_GMI_A16_PJ7,
+	PMUX_PINGRP_GMI_A17_PB0,
+	PMUX_PINGRP_GMI_A18_PB1,
+	PMUX_PINGRP_GMI_A19_PK7,
+	PMUX_PINGRP_GMI_WR_N_PI0,
+	PMUX_PINGRP_GMI_OE_N_PI1,
+	PMUX_PINGRP_GMI_DQS_PI2,
+	PMUX_PINGRP_GMI_RST_N_PI4,
+	PMUX_PINGRP_GEN2_I2C_SCL_PT5,
+	PMUX_PINGRP_GEN2_I2C_SDA_PT6,
+	PMUX_PINGRP_SDMMC4_CLK_PCC4,
+	PMUX_PINGRP_SDMMC4_CMD_PT7,
+	PMUX_PINGRP_SDMMC4_DAT0_PAA0,
+	PMUX_PINGRP_SDMMC4_DAT1_PAA1,
+	PMUX_PINGRP_SDMMC4_DAT2_PAA2,
+	PMUX_PINGRP_SDMMC4_DAT3_PAA3,
+	PMUX_PINGRP_SDMMC4_DAT4_PAA4,
+	PMUX_PINGRP_SDMMC4_DAT5_PAA5,
+	PMUX_PINGRP_SDMMC4_DAT6_PAA6,
+	PMUX_PINGRP_SDMMC4_DAT7_PAA7,
+	PMUX_PINGRP_SDMMC4_RST_N_PCC3,
+	PMUX_PINGRP_CAM_MCLK_PCC0,
+	PMUX_PINGRP_PCC1,
+	PMUX_PINGRP_PBB0,
+	PMUX_PINGRP_CAM_I2C_SCL_PBB1,
+	PMUX_PINGRP_CAM_I2C_SDA_PBB2,
+	PMUX_PINGRP_PBB3,
+	PMUX_PINGRP_PBB4,
+	PMUX_PINGRP_PBB5,
+	PMUX_PINGRP_PBB6,
+	PMUX_PINGRP_PBB7,
+	PMUX_PINGRP_PCC2,
+	PMUX_PINGRP_JTAG_RTCK_PU7,
+	PMUX_PINGRP_PWR_I2C_SCL_PZ6,
+	PMUX_PINGRP_PWR_I2C_SDA_PZ7,
+	PMUX_PINGRP_KB_ROW0_PR0,
+	PMUX_PINGRP_KB_ROW1_PR1,
+	PMUX_PINGRP_KB_ROW2_PR2,
+	PMUX_PINGRP_KB_ROW3_PR3,
+	PMUX_PINGRP_KB_ROW4_PR4,
+	PMUX_PINGRP_KB_ROW5_PR5,
+	PMUX_PINGRP_KB_ROW6_PR6,
+	PMUX_PINGRP_KB_ROW7_PR7,
+	PMUX_PINGRP_KB_ROW8_PS0,
+	PMUX_PINGRP_KB_ROW9_PS1,
+	PMUX_PINGRP_KB_ROW10_PS2,
+	PMUX_PINGRP_KB_ROW11_PS3,
+	PMUX_PINGRP_KB_ROW12_PS4,
+	PMUX_PINGRP_KB_ROW13_PS5,
+	PMUX_PINGRP_KB_ROW14_PS6,
+	PMUX_PINGRP_KB_ROW15_PS7,
+	PMUX_PINGRP_KB_COL0_PQ0,
+	PMUX_PINGRP_KB_COL1_PQ1,
+	PMUX_PINGRP_KB_COL2_PQ2,
+	PMUX_PINGRP_KB_COL3_PQ3,
+	PMUX_PINGRP_KB_COL4_PQ4,
+	PMUX_PINGRP_KB_COL5_PQ5,
+	PMUX_PINGRP_KB_COL6_PQ6,
+	PMUX_PINGRP_KB_COL7_PQ7,
+	PMUX_PINGRP_CLK_32K_OUT_PA0,
+	PMUX_PINGRP_SYS_CLK_REQ_PZ5,
+	PMUX_PINGRP_CORE_PWR_REQ,
+	PMUX_PINGRP_CPU_PWR_REQ,
+	PMUX_PINGRP_PWR_INT_N,
+	PMUX_PINGRP_CLK_32K_IN,
+	PMUX_PINGRP_OWR,
+	PMUX_PINGRP_DAP1_FS_PN0,
+	PMUX_PINGRP_DAP1_DIN_PN1,
+	PMUX_PINGRP_DAP1_DOUT_PN2,
+	PMUX_PINGRP_DAP1_SCLK_PN3,
+	PMUX_PINGRP_CLK1_REQ_PEE2,
+	PMUX_PINGRP_CLK1_OUT_PW4,
+	PMUX_PINGRP_SPDIF_IN_PK6,
+	PMUX_PINGRP_SPDIF_OUT_PK5,
+	PMUX_PINGRP_DAP2_FS_PA2,
+	PMUX_PINGRP_DAP2_DIN_PA4,
+	PMUX_PINGRP_DAP2_DOUT_PA5,
+	PMUX_PINGRP_DAP2_SCLK_PA3,
+	PMUX_PINGRP_SPI2_MOSI_PX0,
+	PMUX_PINGRP_SPI2_MISO_PX1,
+	PMUX_PINGRP_SPI2_CS0_N_PX3,
+	PMUX_PINGRP_SPI2_SCK_PX2,
+	PMUX_PINGRP_SPI1_MOSI_PX4,
+	PMUX_PINGRP_SPI1_SCK_PX5,
+	PMUX_PINGRP_SPI1_CS0_N_PX6,
+	PMUX_PINGRP_SPI1_MISO_PX7,
+	PMUX_PINGRP_SPI2_CS1_N_PW2,
+	PMUX_PINGRP_SPI2_CS2_N_PW3,
+	PMUX_PINGRP_SDMMC3_CLK_PA6,
+	PMUX_PINGRP_SDMMC3_CMD_PA7,
+	PMUX_PINGRP_SDMMC3_DAT0_PB7,
+	PMUX_PINGRP_SDMMC3_DAT1_PB6,
+	PMUX_PINGRP_SDMMC3_DAT2_PB5,
+	PMUX_PINGRP_SDMMC3_DAT3_PB4,
+	PMUX_PINGRP_SDMMC3_DAT4_PD1,
+	PMUX_PINGRP_SDMMC3_DAT5_PD0,
+	PMUX_PINGRP_SDMMC3_DAT6_PD3,
+	PMUX_PINGRP_SDMMC3_DAT7_PD4,
+	PMUX_PINGRP_PEX_L0_PRSNT_N_PDD0,
+	PMUX_PINGRP_PEX_L0_RST_N_PDD1,
+	PMUX_PINGRP_PEX_L0_CLKREQ_N_PDD2,
+	PMUX_PINGRP_PEX_WAKE_N_PDD3,
+	PMUX_PINGRP_PEX_L1_PRSNT_N_PDD4,
+	PMUX_PINGRP_PEX_L1_RST_N_PDD5,
+	PMUX_PINGRP_PEX_L1_CLKREQ_N_PDD6,
+	PMUX_PINGRP_PEX_L2_PRSNT_N_PDD7,
+	PMUX_PINGRP_PEX_L2_RST_N_PCC6,
+	PMUX_PINGRP_PEX_L2_CLKREQ_N_PCC7,
+	PMUX_PINGRP_HDMI_CEC_PEE3,
 	PMUX_PINGRP_COUNT,
 };
 
 enum pmux_drvgrp {
-	PDRIVE_PINGROUP_AO1 = 0, /* offset 0x868 */
-	PDRIVE_PINGROUP_AO2,
-	PDRIVE_PINGROUP_AT1,
-	PDRIVE_PINGROUP_AT2,
-	PDRIVE_PINGROUP_AT3,
-	PDRIVE_PINGROUP_AT4,
-	PDRIVE_PINGROUP_AT5,
-	PDRIVE_PINGROUP_CDEV1,
-	PDRIVE_PINGROUP_CDEV2,
-	PDRIVE_PINGROUP_CSUS,
-	PDRIVE_PINGROUP_DAP1,
-	PDRIVE_PINGROUP_DAP2,
-	PDRIVE_PINGROUP_DAP3,
-	PDRIVE_PINGROUP_DAP4,
-	PDRIVE_PINGROUP_DBG,
-	PDRIVE_PINGROUP_LCD1,
-	PDRIVE_PINGROUP_LCD2,
-	PDRIVE_PINGROUP_SDIO2,
-	PDRIVE_PINGROUP_SDIO3,
-	PDRIVE_PINGROUP_SPI,
-	PDRIVE_PINGROUP_UAA,
-	PDRIVE_PINGROUP_UAB,
-	PDRIVE_PINGROUP_UART2,
-	PDRIVE_PINGROUP_UART3,
-	PDRIVE_PINGROUP_VI1 = 24,	/* offset 0x8c8 */
-	PDRIVE_PINGROUP_SDIO1 = 33,	/* offset 0x8ec */
-	PDRIVE_PINGROUP_CRT = 36,	/* offset 0x8f8 */
-	PDRIVE_PINGROUP_DDC,
-	PDRIVE_PINGROUP_GMA,
-	PDRIVE_PINGROUP_GMB,
-	PDRIVE_PINGROUP_GMC,
-	PDRIVE_PINGROUP_GMD,
-	PDRIVE_PINGROUP_GME,
-	PDRIVE_PINGROUP_GMF,
-	PDRIVE_PINGROUP_GMG,
-	PDRIVE_PINGROUP_GMH,
-	PDRIVE_PINGROUP_OWR,
-	PDRIVE_PINGROUP_UAD,
-	PDRIVE_PINGROUP_GPV,
-	PDRIVE_PINGROUP_DEV3 = 49,	/* offset 0x92c */
-	PDRIVE_PINGROUP_CEC = 52,	/* offset 0x938 */
+	PMUX_DRVGRP_AO1,
+	PMUX_DRVGRP_AO2,
+	PMUX_DRVGRP_AT1,
+	PMUX_DRVGRP_AT2,
+	PMUX_DRVGRP_AT3,
+	PMUX_DRVGRP_AT4,
+	PMUX_DRVGRP_AT5,
+	PMUX_DRVGRP_CDEV1,
+	PMUX_DRVGRP_CDEV2,
+	PMUX_DRVGRP_CSUS,
+	PMUX_DRVGRP_DAP1,
+	PMUX_DRVGRP_DAP2,
+	PMUX_DRVGRP_DAP3,
+	PMUX_DRVGRP_DAP4,
+	PMUX_DRVGRP_DBG,
+	PMUX_DRVGRP_LCD1,
+	PMUX_DRVGRP_LCD2,
+	PMUX_DRVGRP_SDIO2,
+	PMUX_DRVGRP_SDIO3,
+	PMUX_DRVGRP_SPI,
+	PMUX_DRVGRP_UAA,
+	PMUX_DRVGRP_UAB,
+	PMUX_DRVGRP_UART2,
+	PMUX_DRVGRP_UART3,
+	PMUX_DRVGRP_VI1,
+	PMUX_DRVGRP_SDIO1 = (0x84 / 4),
+	PMUX_DRVGRP_CRT = (0x90 / 4),
+	PMUX_DRVGRP_DDC,
+	PMUX_DRVGRP_GMA,
+	PMUX_DRVGRP_GMB,
+	PMUX_DRVGRP_GMC,
+	PMUX_DRVGRP_GMD,
+	PMUX_DRVGRP_GME,
+	PMUX_DRVGRP_GMF,
+	PMUX_DRVGRP_GMG,
+	PMUX_DRVGRP_GMH,
+	PMUX_DRVGRP_OWR,
+	PMUX_DRVGRP_UDA,
+	PMUX_DRVGRP_GPV,
+	PMUX_DRVGRP_DEV3,
+	PMUX_DRVGRP_CEC = (0xd0 / 4),
 	PMUX_DRVGRP_COUNT,
 };
 
-/*
- * Functions which can be assigned to each of the pin groups. The values here
- * bear no relation to the values programmed into pinmux registers and are
- * purely a convenience. The translation is done through a table search.
- */
 enum pmux_func {
-	PMUX_FUNC_AHB_CLK,
-	PMUX_FUNC_APB_CLK,
-	PMUX_FUNC_AUDIO_SYNC,
+	PMUX_FUNC_BLINK,
+	PMUX_FUNC_CEC,
+	PMUX_FUNC_CLK_12M_OUT,
+	PMUX_FUNC_CLK_32K_IN,
+	PMUX_FUNC_CORE_PWR_REQ,
+	PMUX_FUNC_CPU_PWR_REQ,
 	PMUX_FUNC_CRT,
-	PMUX_FUNC_DAP1,
-	PMUX_FUNC_DAP2,
-	PMUX_FUNC_DAP3,
-	PMUX_FUNC_DAP4,
-	PMUX_FUNC_DAP5,
-	PMUX_FUNC_DISPA,
-	PMUX_FUNC_DISPB,
-	PMUX_FUNC_EMC_TEST0_DLL,
-	PMUX_FUNC_EMC_TEST1_DLL,
+	PMUX_FUNC_DAP,
+	PMUX_FUNC_DDR,
+	PMUX_FUNC_DEV3,
+	PMUX_FUNC_DISPLAYA,
+	PMUX_FUNC_DISPLAYB,
+	PMUX_FUNC_DTV,
+	PMUX_FUNC_EXTPERIPH1,
+	PMUX_FUNC_EXTPERIPH2,
+	PMUX_FUNC_EXTPERIPH3,
 	PMUX_FUNC_GMI,
-	PMUX_FUNC_GMI_INT,
+	PMUX_FUNC_GMI_ALT,
+	PMUX_FUNC_HDA,
+	PMUX_FUNC_HDCP,
 	PMUX_FUNC_HDMI,
+	PMUX_FUNC_HSI,
 	PMUX_FUNC_I2C1,
 	PMUX_FUNC_I2C2,
 	PMUX_FUNC_I2C3,
-	PMUX_FUNC_IDE,
+	PMUX_FUNC_I2C4,
+	PMUX_FUNC_I2CPWR,
+	PMUX_FUNC_I2S0,
+	PMUX_FUNC_I2S1,
+	PMUX_FUNC_I2S2,
+	PMUX_FUNC_I2S3,
+	PMUX_FUNC_I2S4,
+	PMUX_FUNC_INVALID,
 	PMUX_FUNC_KBC,
 	PMUX_FUNC_MIO,
-	PMUX_FUNC_MIPI_HS,
 	PMUX_FUNC_NAND,
-	PMUX_FUNC_OSC,
+	PMUX_FUNC_NAND_ALT,
 	PMUX_FUNC_OWR,
 	PMUX_FUNC_PCIE,
-	PMUX_FUNC_PLLA_OUT,
-	PMUX_FUNC_PLLC_OUT1,
-	PMUX_FUNC_PLLM_OUT1,
-	PMUX_FUNC_PLLP_OUT2,
-	PMUX_FUNC_PLLP_OUT3,
-	PMUX_FUNC_PLLP_OUT4,
-	PMUX_FUNC_PWM,
-	PMUX_FUNC_PWR_INTR,
-	PMUX_FUNC_PWR_ON,
+	PMUX_FUNC_PWM0,
+	PMUX_FUNC_PWM1,
+	PMUX_FUNC_PWM2,
+	PMUX_FUNC_PWM3,
+	PMUX_FUNC_PWR_INT_N,
 	PMUX_FUNC_RTCK,
+	PMUX_FUNC_SATA,
 	PMUX_FUNC_SDMMC1,
 	PMUX_FUNC_SDMMC2,
 	PMUX_FUNC_SDMMC3,
 	PMUX_FUNC_SDMMC4,
-	PMUX_FUNC_SFLASH,
 	PMUX_FUNC_SPDIF,
 	PMUX_FUNC_SPI1,
 	PMUX_FUNC_SPI2,
 	PMUX_FUNC_SPI2_ALT,
 	PMUX_FUNC_SPI3,
 	PMUX_FUNC_SPI4,
+	PMUX_FUNC_SPI5,
+	PMUX_FUNC_SPI6,
+	PMUX_FUNC_SYSCLK,
+	PMUX_FUNC_TEST,
 	PMUX_FUNC_TRACE,
-	PMUX_FUNC_TWC,
 	PMUX_FUNC_UARTA,
 	PMUX_FUNC_UARTB,
 	PMUX_FUNC_UARTC,
 	PMUX_FUNC_UARTD,
 	PMUX_FUNC_UARTE,
 	PMUX_FUNC_ULPI,
-	PMUX_FUNC_VI,
-	PMUX_FUNC_VI_SENSOR_CLK,
-	PMUX_FUNC_XIO,
-	PMUX_FUNC_BLINK,
-	PMUX_FUNC_CEC,
-	PMUX_FUNC_CLK12,
-	PMUX_FUNC_DAP,
-	PMUX_FUNC_DAPSDMMC2,
-	PMUX_FUNC_DDR,
-	PMUX_FUNC_DEV3,
-	PMUX_FUNC_DTV,
-	PMUX_FUNC_VI_ALT1,
-	PMUX_FUNC_VI_ALT2,
-	PMUX_FUNC_VI_ALT3,
-	PMUX_FUNC_EMC_DLL,
-	PMUX_FUNC_EXTPERIPH1,
-	PMUX_FUNC_EXTPERIPH2,
-	PMUX_FUNC_EXTPERIPH3,
-	PMUX_FUNC_GMI_ALT,
-	PMUX_FUNC_HDA,
-	PMUX_FUNC_HSI,
-	PMUX_FUNC_I2C4,
-	PMUX_FUNC_I2C5,
-	PMUX_FUNC_I2CPWR,
-	PMUX_FUNC_I2S0,
-	PMUX_FUNC_I2S1,
-	PMUX_FUNC_I2S2,
-	PMUX_FUNC_I2S3,
-	PMUX_FUNC_I2S4,
-	PMUX_FUNC_NAND_ALT,
-	PMUX_FUNC_POPSDIO4,
-	PMUX_FUNC_POPSDMMC4,
-	PMUX_FUNC_PWM0,
-	PMUX_FUNC_PWM1,
-	PMUX_FUNC_PWM2,
-	PMUX_FUNC_PWM3,
-	PMUX_FUNC_SATA,
-	PMUX_FUNC_SPI5,
-	PMUX_FUNC_SPI6,
-	PMUX_FUNC_SYSCLK,
 	PMUX_FUNC_VGP1,
 	PMUX_FUNC_VGP2,
 	PMUX_FUNC_VGP3,
 	PMUX_FUNC_VGP4,
 	PMUX_FUNC_VGP5,
 	PMUX_FUNC_VGP6,
-	PMUX_FUNC_CLK_12M_OUT,
-	PMUX_FUNC_HDCP,
-	PMUX_FUNC_TEST,
-	PMUX_FUNC_CORE_PWR_REQ,
-	PMUX_FUNC_CPU_PWR_REQ,
-	PMUX_FUNC_PWR_INT_N,
-	PMUX_FUNC_CLK_32K_IN,
-
+	PMUX_FUNC_VI,
+	PMUX_FUNC_VI_ALT1,
+	PMUX_FUNC_VI_ALT2,
+	PMUX_FUNC_VI_ALT3,
 	PMUX_FUNC_COUNT,
-
 	PMUX_FUNC_RSVD1 = 0x8000,
 	PMUX_FUNC_RSVD2 = 0x8001,
 	PMUX_FUNC_RSVD3 = 0x8002,