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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-03-16 16:43:22 +0900 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2015-04-29 11:19:05 +0200 |
commit | 0107f2403669f764ab726d0d404e35bb9447bbcc (patch) | |
tree | b35d4ca109c56dc4f0033d73199207b07eee06e7 /arch/arm/mach-zynq/ddrc.c | |
parent | 7472a5dfcbbc3180d3e728bbd4233c21243ea943 (diff) | |
download | u-boot-imx-0107f2403669f764ab726d0d404e35bb9447bbcc.zip u-boot-imx-0107f2403669f764ab726d0d404e35bb9447bbcc.tar.gz u-boot-imx-0107f2403669f764ab726d0d404e35bb9447bbcc.tar.bz2 |
ARM: zynq: move SoC sources to mach-zynq
Move arch/arm/cpu/armv7/zynq/* -> arch/arm/mach-zynq/*
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/mach-zynq/ddrc.c')
-rw-r--r-- | arch/arm/mach-zynq/ddrc.c | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/mach-zynq/ddrc.c b/arch/arm/mach-zynq/ddrc.c new file mode 100644 index 0000000..5b20acc --- /dev/null +++ b/arch/arm/mach-zynq/ddrc.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2012 - 2013 Michal Simek <monstr@monstr.eu> + * Copyright (C) 2012 - 2013 Xilinx, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/hardware.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* Control regsiter bitfield definitions */ +#define ZYNQ_DDRC_CTRLREG_BUSWIDTH_MASK 0xC +#define ZYNQ_DDRC_CTRLREG_BUSWIDTH_SHIFT 2 +#define ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT 1 + +/* ECC scrub regsiter definitions */ +#define ZYNQ_DDRC_ECC_SCRUBREG_ECC_MODE_MASK 0x7 +#define ZYNQ_DDRC_ECC_SCRUBREG_ECCMODE_SECDED 0x4 + +void zynq_ddrc_init(void) +{ + u32 width, ecctype; + + width = readl(&ddrc_base->ddrc_ctrl); + width = (width & ZYNQ_DDRC_CTRLREG_BUSWIDTH_MASK) >> + ZYNQ_DDRC_CTRLREG_BUSWIDTH_SHIFT; + ecctype = (readl(&ddrc_base->ecc_scrub) & + ZYNQ_DDRC_ECC_SCRUBREG_ECC_MODE_MASK); + + /* ECC is enabled when memory is in 16bit mode and it is enabled */ + if ((ecctype == ZYNQ_DDRC_ECC_SCRUBREG_ECCMODE_SECDED) && + (width == ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT)) { + puts("ECC enabled "); + /* + * Clear the first 1MB because it is not initialized from + * first stage bootloader. To get ECC to work all memory has + * been initialized by writing any value. + */ + /* cppcheck-suppress nullPointer */ + memset((void *)0, 0, 1 * 1024 * 1024); + + gd->ram_size /= 2; + } else { + puts("ECC disabled "); + } +} |