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author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-02-27 02:27:04 +0900 |
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committer | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-03-01 00:03:13 +0900 |
commit | 6cc2120646a3230bcf4b57cb3cb937f4a1cfe150 (patch) | |
tree | da73383c242ddacceaf270584d2a1ba62260d37c /arch/arm/mach-uniphier/include/mach/sg-regs.h | |
parent | afed8c1b6a28bc201dd3633f914572bbf693e620 (diff) | |
download | u-boot-imx-6cc2120646a3230bcf4b57cb3cb937f4a1cfe150.zip u-boot-imx-6cc2120646a3230bcf4b57cb3cb937f4a1cfe150.tar.gz u-boot-imx-6cc2120646a3230bcf4b57cb3cb937f4a1cfe150.tar.bz2 |
ARM: UniPhier: consolidate MEMCONF setting code
This code is duplicated in ph1-ld4/sg_init.c and ph1-pro4/sg_init.c.
Merge the same code into a new file, memconf.c.
The helper functions no longer have to be placed in the header file.
Also, move them into memconf.c.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'arch/arm/mach-uniphier/include/mach/sg-regs.h')
-rw-r--r-- | arch/arm/mach-uniphier/include/mach/sg-regs.h | 119 |
1 files changed, 1 insertions, 118 deletions
diff --git a/arch/arm/mach-uniphier/include/mach/sg-regs.h b/arch/arm/mach-uniphier/include/mach/sg-regs.h index 4ae67c8..63408d5 100644 --- a/arch/arm/mach-uniphier/include/mach/sg-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sg-regs.h @@ -1,7 +1,7 @@ /* * UniPhier SG (SoC Glue) block registers * - * Copyright (C) 2011-2014 Panasonic Corporation + * Copyright (C) 2011-2015 Panasonic Corporation * * SPDX-License-Identifier: GPL-2.0+ */ @@ -108,7 +108,6 @@ #else #include <linux/types.h> -#include <linux/sizes.h> #include <asm/io.h> static inline void sg_set_pinsel(int n, int value) @@ -117,122 +116,6 @@ static inline void sg_set_pinsel(int n, int value) | SG_PINSEL_MODE(n, value), SG_PINSEL_ADDR(n)); } -static inline u32 sg_memconf_val_ch0(unsigned long size, int num) -{ - int size_mb = size / num; - u32 ret; - - switch (size_mb) { - case SZ_64M: - ret = SG_MEMCONF_CH0_SZ_64M; - break; - case SZ_128M: - ret = SG_MEMCONF_CH0_SZ_128M; - break; - case SZ_256M: - ret = SG_MEMCONF_CH0_SZ_256M; - break; - case SZ_512M: - ret = SG_MEMCONF_CH0_SZ_512M; - break; - case SZ_1G: - ret = SG_MEMCONF_CH0_SZ_1G; - break; - default: - BUG(); - break; - } - - switch (num) { - case 1: - ret |= SG_MEMCONF_CH0_NUM_1; - break; - case 2: - ret |= SG_MEMCONF_CH0_NUM_2; - break; - default: - BUG(); - break; - } - return ret; -} - -static inline u32 sg_memconf_val_ch1(unsigned long size, int num) -{ - int size_mb = size / num; - u32 ret; - - switch (size_mb) { - case SZ_64M: - ret = SG_MEMCONF_CH1_SZ_64M; - break; - case SZ_128M: - ret = SG_MEMCONF_CH1_SZ_128M; - break; - case SZ_256M: - ret = SG_MEMCONF_CH1_SZ_256M; - break; - case SZ_512M: - ret = SG_MEMCONF_CH1_SZ_512M; - break; - case SZ_1G: - ret = SG_MEMCONF_CH1_SZ_1G; - break; - default: - BUG(); - break; - } - - switch (num) { - case 1: - ret |= SG_MEMCONF_CH1_NUM_1; - break; - case 2: - ret |= SG_MEMCONF_CH1_NUM_2; - break; - default: - BUG(); - break; - } - return ret; -} - -static inline u32 sg_memconf_val_ch2(unsigned long size, int num) -{ - int size_mb = size / num; - u32 ret; - - switch (size_mb) { - case SZ_64M: - ret = SG_MEMCONF_CH2_SZ_64M; - break; - case SZ_128M: - ret = SG_MEMCONF_CH2_SZ_128M; - break; - case SZ_256M: - ret = SG_MEMCONF_CH2_SZ_256M; - break; - case SZ_512M: - ret = SG_MEMCONF_CH2_SZ_512M; - break; - default: - BUG(); - break; - } - - switch (num) { - case 1: - ret |= SG_MEMCONF_CH2_NUM_1; - break; - case 2: - ret |= SG_MEMCONF_CH2_NUM_2; - break; - default: - BUG(); - break; - } - return ret; -} #endif /* __ASSEMBLY__ */ #endif /* ARCH_SG_REGS_H */ |