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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-02-26 14:21:37 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-02-29 03:50:16 +0900 |
commit | 94b756f3318b5dea3c1aefa670f43ae85d780144 (patch) | |
tree | 25c766b132f6d59834c06892c4b344d97fca677a /arch/arm/mach-uniphier/dram/ddrphy-regs.h | |
parent | a54c879a423959b475f6f67c4cbf1c744e08849a (diff) | |
download | u-boot-imx-94b756f3318b5dea3c1aefa670f43ae85d780144.zip u-boot-imx-94b756f3318b5dea3c1aefa670f43ae85d780144.tar.gz u-boot-imx-94b756f3318b5dea3c1aefa670f43ae85d780144.tar.bz2 |
ARM: uniphier: refactor UMC init code for ProXstream2
Currently, a dummy value is defined for the UMC_SPCCTLA register
when the DRAM size is zero. This seems weird because the controller
does not need setting in the first place if the size is zero.
Also, redefine enum dram_size to represent the DRAM size per 16-bit
unit. This makes things simpler because the channel 0 and 1 are
connected with 32-bit width DRAM, while the channel 2 is connected
with 16-bit width one.
I am renaming SIZE_* into DRAM_SZ_* (and also FREQ_* to DRAM_FREQ_*
for consistency) while I am here because SIZE_* might be easily
mixed-up with the macros in include/linux/sizes.h.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/dram/ddrphy-regs.h')
0 files changed, 0 insertions, 0 deletions