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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-05-24 21:14:01 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-05-26 00:37:13 +0900 |
commit | 667dbcd01d35a69a0a01ecd09b9f18d9aa0efe72 (patch) | |
tree | 4cf4bbe11b662cbc8e7625fede4c2a5d0bb2c2e0 /arch/arm/mach-uniphier/clk | |
parent | 7381db86a90bb36d6e615da835ae6964af68f260 (diff) | |
download | u-boot-imx-667dbcd01d35a69a0a01ecd09b9f18d9aa0efe72.zip u-boot-imx-667dbcd01d35a69a0a01ecd09b9f18d9aa0efe72.tar.gz u-boot-imx-667dbcd01d35a69a0a01ecd09b9f18d9aa0efe72.tar.bz2 |
ARM: uniphier: add PH1-LD11 SoC support
This is a low-cost ARMv8 SoC from Socionext Inc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/clk')
-rw-r--r-- | arch/arm/mach-uniphier/clk/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-uniphier/clk/clk-ld11.c | 28 |
2 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile index 93e9d91..1428e0c 100644 --- a/arch/arm/mach-uniphier/clk/Makefile +++ b/arch/arm/mach-uniphier/clk/Makefile @@ -9,4 +9,5 @@ obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-pro5.o obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD11) += clk-ld11.o obj-$(CONFIG_ARCH_UNIPHIER_LD20) += clk-ld20.o diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c b/arch/arm/mach-uniphier/clk/clk-ld11.c new file mode 100644 index 0000000..92a0733 --- /dev/null +++ b/arch/arm/mach-uniphier/clk/clk-ld11.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2016 Socionext Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <linux/bitops.h> +#include <linux/io.h> + +#include "../init.h" +#include "../sg-regs.h" + +void uniphier_ld11_clk_init(void) +{ + if (readl(SG_PINMON0) & BIT(27)) { + /* if booted without stand-by MPU */ + + writel(1, SG_ETPHYPSHUT); + writel(1, SG_ETPHYCNT); + + udelay(1); /* wait for regulator level 1.1V -> 2.5V */ + + writel(3, SG_ETPHYCNT); + writel(3, SG_ETPHYPSHUT); + writel(7, SG_ETPHYCNT); + } +} |