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| author | Tom Rini <trini@konsulko.com> | 2016-09-18 12:12:04 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-09-18 14:05:30 -0400 |
| commit | 9a6535e05f17acf03e891266a650cb6029124743 (patch) | |
| tree | fec0cd46e0f050812deecf89b8bb349c8fdffd0e /arch/arm/mach-uniphier/clk/pll-ld20.c | |
| parent | b58d3512442357cb023bce69f55c08b9fd21beaa (diff) | |
| parent | f9d7e17e844f9e94c39a8c95f73a4454097a6948 (diff) | |
| download | u-boot-imx-9a6535e05f17acf03e891266a650cb6029124743.zip u-boot-imx-9a6535e05f17acf03e891266a650cb6029124743.tar.gz u-boot-imx-9a6535e05f17acf03e891266a650cb6029124743.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
Diffstat (limited to 'arch/arm/mach-uniphier/clk/pll-ld20.c')
| -rw-r--r-- | arch/arm/mach-uniphier/clk/pll-ld20.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/clk/pll-ld20.c b/arch/arm/mach-uniphier/clk/pll-ld20.c new file mode 100644 index 0000000..5e545da --- /dev/null +++ b/arch/arm/mach-uniphier/clk/pll-ld20.c @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> + +#include "../init.h" +#include "../sc64-regs.h" +#include "pll.h" + +int uniphier_ld20_pll_init(const struct uniphier_board_data *bd) +{ + unsigned int dpll_ssc_rate = UNIPHIER_BD_DPLL_SSC_GET_RATE(bd->flags); + + uniphier_ld20_sscpll_init(SC_CPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 4); + /* do nothing for SPLL */ + uniphier_ld20_sscpll_init(SC_SPLL2CTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 4); + uniphier_ld20_sscpll_init(SC_MPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 2); + uniphier_ld20_sscpll_init(SC_VPPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 4); + uniphier_ld20_sscpll_init(SC_GPPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 2); + + mdelay(1); + + if (dpll_ssc_rate > 0) { + uniphier_ld20_sscpll_ssc_en(SC_DPLL0CTRL); + uniphier_ld20_sscpll_ssc_en(SC_DPLL1CTRL); + uniphier_ld20_sscpll_ssc_en(SC_DPLL2CTRL); + } + + uniphier_ld20_vpll27_init(SC_VPLL27FCTRL); + uniphier_ld20_vpll27_init(SC_VPLL27ACTRL); + + uniphier_ld20_dspll_init(SC_VPLL8KCTRL); + uniphier_ld20_dspll_init(SC_A2PLLCTRL); + + return 0; +} |