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authorThierry Reding <treding@nvidia.com>2015-07-22 15:58:05 -0600
committerTom Warren <twarren@nvidia.com>2015-07-27 15:54:18 -0700
commitf49357baadb6ff30b5c8a43019e3c655d75b036b (patch)
treec0177844fc986f6a3f7989f3be7544a62b631de1 /arch/arm/mach-tegra
parentc39e2a75fddce793c89647ccb0500dfe6a1eac05 (diff)
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ARM: tegra: Build warning fixes for 64-bit
Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> [swarren, stripped out changes not strictly related to warnings] Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/ap.c4
-rw-r--r--arch/arm/mach-tegra/pinmux-common.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c
index 0b94e8a..7b89c01 100644
--- a/arch/arm/mach-tegra/ap.c
+++ b/arch/arm/mach-tegra/ap.c
@@ -131,8 +131,8 @@ static u32 get_odmdata(void)
* on BCTs for currently supported SoCs, which are locked down.
* If this changes in new chips, we can revisit this algorithm.
*/
-
- u32 bct_start, odmdata;
+ unsigned long bct_start;
+ u32 odmdata;
bct_start = readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BCTPTR);
odmdata = readl(bct_start + BCT_ODMDATA_OFFSET);
diff --git a/arch/arm/mach-tegra/pinmux-common.c b/arch/arm/mach-tegra/pinmux-common.c
index b4a1432..5862c4a 100644
--- a/arch/arm/mach-tegra/pinmux-common.c
+++ b/arch/arm/mach-tegra/pinmux-common.c
@@ -78,7 +78,7 @@
(((hsm) >= PMUX_HSM_DISABLE) && ((hsm) <= PMUX_HSM_ENABLE))
#endif
-#define _R(offset) (u32 *)(NV_PA_APB_MISC_BASE + (offset))
+#define _R(offset) (u32 *)((unsigned long)NV_PA_APB_MISC_BASE + (offset))
#if defined(CONFIG_TEGRA20)