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| author | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-09-01 17:41:52 -0500 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-09-04 11:54:21 +0200 |
| commit | 55c7a765f63ab10b9a3b8cbd38bf1483901a7b36 (patch) | |
| tree | a8eabfa6dfcb9a14836486a3687eedc7b550a1a3 /arch/arm/mach-socfpga | |
| parent | d88995a82bb111de2035b90aa17e92c2c6b00ede (diff) | |
| download | u-boot-imx-55c7a765f63ab10b9a3b8cbd38bf1483901a7b36.zip u-boot-imx-55c7a765f63ab10b9a3b8cbd38bf1483901a7b36.tar.gz u-boot-imx-55c7a765f63ab10b9a3b8cbd38bf1483901a7b36.tar.bz2 | |
arm: socfpga: Add support for the Terasic DE-0 Atlas board
Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV
based board. The board can boot from SD/MMC. Ethernet is also supported.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm/mach-socfpga')
| -rw-r--r-- | arch/arm/mach-socfpga/Kconfig | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 1244ef4..089280a 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -22,6 +22,10 @@ config TARGET_SOCFPGA_DENX_MCVEVK bool "DENX MCVEVK (Cyclone V)" select TARGET_SOCFPGA_CYCLONE5 +config TARGET_SOCFPGA_TERASIC_DE0_NANO + bool "Terasic DE0-Nano-Atlas (Cyclone V)" + select TARGET_SOCFPGA_CYCLONE5 + config TARGET_SOCFPGA_TERASIC_SOCKIT bool "Terasic SoCkit (Cyclone V)" select TARGET_SOCFPGA_CYCLONE5 @@ -31,6 +35,7 @@ endchoice config SYS_BOARD default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK + default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT @@ -38,6 +43,7 @@ config SYS_VENDOR default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK default "denx" if TARGET_SOCFPGA_DENX_MCVEVK + default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT config SYS_SOC @@ -46,6 +52,7 @@ config SYS_SOC config SYS_CONFIG_NAME default "socfpga_arria5" if TARGET_SOCFPGA_ARRIA5_SOCDK default "socfpga_cyclone5" if TARGET_SOCFPGA_CYCLONE5_SOCDK + default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT |