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authorMarek Vasut <marex@denx.de>2015-07-09 04:48:56 +0200
committerMarek Vasut <marex@denx.de>2015-08-08 14:14:07 +0200
commit4a0080d98517a3d9b423a319331e73975b43b706 (patch)
tree5491df6b428142354e07c1622c9034b70770ab62 /arch/arm/mach-socfpga
parent2d779b39b4e11c4db7a2796af76051e70a556c5f (diff)
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arm: socfpga: spl: Toggle warm reset config I/O bit
Synchronise the SPL behavior with the original Altera code and toggle the Warm Reset Config I/O bit accordingly. Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch/arm/mach-socfpga')
-rw-r--r--arch/arm/mach-socfpga/spl.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
index fd54ea9..8345975 100644
--- a/arch/arm/mach-socfpga/spl.c
+++ b/arch/arm/mach-socfpga/spl.c
@@ -84,8 +84,13 @@ void spl_board_init(void)
if (scan_mgr_configure_iocsr())
hang();
+ sysmgr_config_warmrstcfgio(0);
+
/* configure the pin muxing through system manager */
+ sysmgr_config_warmrstcfgio(1);
sysmgr_pinmux_init();
+ sysmgr_config_warmrstcfgio(0);
+
#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */
/* de-assert reset for peripherals and bridges based on handoff */