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authorTom Rini <trini@konsulko.com>2016-10-03 09:09:29 -0400
committerTom Rini <trini@konsulko.com>2016-10-03 09:09:29 -0400
commit51b4a639e45bfb592d7019b4e2a8cc72ad206c9b (patch)
tree4014fa73958f7ad2b9281c60a8e2253f32099239 /arch/arm/mach-rockchip/rk3036-board.c
parente95b9b4437bcc31107bdc3b7625bd7c11ad24ef7 (diff)
parent67171e13a3e0665b18c657a6704a22ca7900f4c3 (diff)
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Merge git://git.denx.de/u-boot-rockchip
Diffstat (limited to 'arch/arm/mach-rockchip/rk3036-board.c')
-rw-r--r--arch/arm/mach-rockchip/rk3036-board.c122
1 files changed, 122 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c
new file mode 100644
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--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3036-board.c
@@ -0,0 +1,122 @@
+/*
+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <ram.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/grf_rk3036.h>
+#include <asm/arch/boot_mode.h>
+#include <asm/arch/sdram_rk3036.h>
+#include <asm/gpio.h>
+#include <dm/pinctrl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define GRF_BASE 0x20008000
+
+static void setup_boot_mode(void)
+{
+ struct rk3036_grf *const grf = (void *)GRF_BASE;
+ int boot_mode = readl(&grf->os_reg[4]);
+
+ debug("boot mode %x.\n", boot_mode);
+
+ /* Clear boot mode */
+ writel(BOOT_NORMAL, &grf->os_reg[4]);
+
+ switch (boot_mode) {
+ case BOOT_FASTBOOT:
+ printf("enter fastboot!\n");
+ setenv("preboot", "setenv preboot; fastboot usb0");
+ break;
+ case BOOT_UMS:
+ printf("enter UMS!\n");
+ setenv("preboot", "setenv preboot; ums mmc 0");
+ break;
+ }
+}
+
+__weak int rk_board_late_init(void)
+{
+ return 0;
+}
+
+int board_late_init(void)
+{
+ setup_boot_mode();
+
+ return rk_board_late_init();
+}
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = sdram_size();
+
+ return 0;
+}
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif
+
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+
+static struct dwc2_plat_otg_data rk3036_otg_data = {
+ .rx_fifo_sz = 512,
+ .np_tx_fifo_sz = 16,
+ .tx_fifo_sz = 128,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+ int node;
+ const char *mode;
+ bool matched = false;
+ const void *blob = gd->fdt_blob;
+
+ /* find the usb_otg node */
+ node = fdt_node_offset_by_compatible(blob, -1,
+ "rockchip,rk3288-usb");
+
+ while (node > 0) {
+ mode = fdt_getprop(blob, node, "dr_mode", NULL);
+ if (mode && strcmp(mode, "otg") == 0) {
+ matched = true;
+ break;
+ }
+
+ node = fdt_node_offset_by_compatible(blob, node,
+ "rockchip,rk3288-usb");
+ }
+ if (!matched) {
+ debug("Not found usb_otg device\n");
+ return -ENODEV;
+ }
+ rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+
+ return dwc2_udc_probe(&rk3036_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+ return 0;
+}
+#endif