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| author | Tom Rini <trini@konsulko.com> | 2016-09-27 11:40:56 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-09-27 11:40:56 -0400 |
| commit | 6d5565608f385b89f528ecf5680410cdc6cf63e9 (patch) | |
| tree | 9403a25d40b8546e1e8a77fbe70da67c5ed4ade0 /arch/arm/mach-mvebu/include/mach | |
| parent | e120c848bac77cfcc88183541c2e966e625a7840 (diff) | |
| parent | b28d29f784f5cc33c92e291d35eda603ea4e58e3 (diff) | |
| download | u-boot-imx-6d5565608f385b89f528ecf5680410cdc6cf63e9.zip u-boot-imx-6d5565608f385b89f528ecf5680410cdc6cf63e9.tar.gz u-boot-imx-6d5565608f385b89f528ecf5680410cdc6cf63e9.tar.bz2 | |
Merge git://www.denx.de/git/u-boot-marvell
Diffstat (limited to 'arch/arm/mach-mvebu/include/mach')
| -rw-r--r-- | arch/arm/mach-mvebu/include/mach/cpu.h | 7 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/include/mach/soc.h | 4 |
2 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h index cbec876..66f7680 100644 --- a/arch/arm/mach-mvebu/include/mach/cpu.h +++ b/arch/arm/mach-mvebu/include/mach/cpu.h @@ -166,5 +166,12 @@ struct mvebu_lcd_info { int mvebu_lcd_register_init(struct mvebu_lcd_info *lcd_info); +/* + * get_ref_clk + * + * return: reference clock in MHz (25 or 40) + */ +u32 get_ref_clk(void); + #endif /* __ASSEMBLY__ */ #endif /* _MVEBU_CPU_H */ diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index 6342cdc..731fe65 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -37,7 +37,7 @@ /* SOC specific definations */ #define INTREG_BASE 0xd0000000 #define INTREG_BASE_ADDR_REG (INTREG_BASE + 0x20080) -#if defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_ARMADA_3700) /* * The SPL U-Boot version still runs with the default * address for the internal registers, configured by @@ -46,6 +46,8 @@ * required for the Linux kernel. */ #define SOC_REGS_PHY_BASE 0xd0000000 +#elif defined(CONFIG_ARMADA_8K) +#define SOC_REGS_PHY_BASE 0xf0000000 #else #define SOC_REGS_PHY_BASE 0xf1000000 #endif |