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| author | Vitaly Andrianov <vitalya@ti.com> | 2015-09-19 16:26:40 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-10-22 14:22:15 -0400 |
| commit | bda920c65e7cc299e6ef0dc6e676fe672609ce12 (patch) | |
| tree | 62ea0859242e5188851daaf365c843eefb495157 /arch/arm/mach-keystone/clock.c | |
| parent | f9c4a51c3e1bc73c5c2ae178cf41aa85bada1fc8 (diff) | |
| download | u-boot-imx-bda920c65e7cc299e6ef0dc6e676fe672609ce12.zip u-boot-imx-bda920c65e7cc299e6ef0dc6e676fe672609ce12.tar.gz u-boot-imx-bda920c65e7cc299e6ef0dc6e676fe672609ce12.tar.bz2 | |
ARM: k2g: Add pll data
Add pll data for k2g
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/mach-keystone/clock.c')
| -rw-r--r-- | arch/arm/mach-keystone/clock.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c index 6cb6467..d936896 100644 --- a/arch/arm/mach-keystone/clock.c +++ b/arch/arm/mach-keystone/clock.c @@ -31,6 +31,7 @@ const struct keystone_pll_regs keystone_pll_regs[] = { [TETRIS_PLL] = {KS2_ARMPLLCTL0, KS2_ARMPLLCTL1}, [DDR3A_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1}, [DDR3B_PLL] = {KS2_DDR3BPLLCTL0, KS2_DDR3BPLLCTL1}, + [UART_PLL] = {KS2_UARTPLLCTL0, KS2_UARTPLLCTL1}, }; inline void pll_pa_clk_sel(void) @@ -313,6 +314,10 @@ static unsigned long pll_freq_get(int pll) ret = external_clk[ddr3b_clk]; reg = KS2_DDR3BPLLCTL0; break; + case UART_PLL: + ret = external_clk[uart_clk]; + reg = KS2_UARTPLLCTL0; + break; default: return 0; } |