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author | Thomas Abraham <thomas.ab@samsung.com> | 2015-08-03 17:58:00 +0530 |
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committer | Minkyu Kang <mk7.kang@samsung.com> | 2015-08-17 13:06:52 +0900 |
commit | 77b55e8cfcee9ce1a973bf4dad3e160dd0be01f3 (patch) | |
tree | 0ec9071faf7ea93eca773777c989f1da65aada24 /arch/arm/mach-exynos/tzpc.c | |
parent | 632093b566569329bc6e5b0893bdca01de905314 (diff) | |
download | u-boot-imx-77b55e8cfcee9ce1a973bf4dad3e160dd0be01f3.zip u-boot-imx-77b55e8cfcee9ce1a973bf4dad3e160dd0be01f3.tar.gz u-boot-imx-77b55e8cfcee9ce1a973bf4dad3e160dd0be01f3.tar.bz2 |
ARM: exynos: move SoC sources to mach-exynos
Move arch/arm/cpu/armv7/exynos/* to arch/arm/mach-exynos/* to allow
reuse of existing code for ARMv8 based Exynos platforms.
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/tzpc.c')
-rw-r--r-- | arch/arm/mach-exynos/tzpc.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/tzpc.c b/arch/arm/mach-exynos/tzpc.c new file mode 100644 index 0000000..395077c --- /dev/null +++ b/arch/arm/mach-exynos/tzpc.c @@ -0,0 +1,41 @@ +/* + * Lowlevel setup for SMDK5250 board based on S5PC520 + * + * Copyright (C) 2012 Samsung Electronics + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/arch/tzpc.h> +#include <asm/io.h> + +/* Setting TZPC[TrustZone Protection Controller] */ +void tzpc_init(void) +{ + struct exynos_tzpc *tzpc; + unsigned int addr, start = 0, end = 0; + + start = samsung_get_base_tzpc(); + + if (cpu_is_exynos5()) + end = start + ((EXYNOS5_NR_TZPC_BANKS - 1) * TZPC_BASE_OFFSET); + else if (cpu_is_exynos4()) + end = start + ((EXYNOS4_NR_TZPC_BANKS - 1) * TZPC_BASE_OFFSET); + + for (addr = start; addr <= end; addr += TZPC_BASE_OFFSET) { + tzpc = (struct exynos_tzpc *)addr; + + if (addr == start) + writel(R0SIZE, &tzpc->r0size); + + writel(DECPROTXSET, &tzpc->decprot0set); + writel(DECPROTXSET, &tzpc->decprot1set); + + if (cpu_is_exynos5() && (addr == end)) + break; + + writel(DECPROTXSET, &tzpc->decprot2set); + writel(DECPROTXSET, &tzpc->decprot3set); + } +} |