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author | Wenyou Yang <wenyou.yang@atmel.com> | 2015-11-05 16:37:52 +0800 |
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committer | Andreas Bießmann <andreas.devel@googlemail.com> | 2015-11-30 22:27:54 +0100 |
commit | b5665bf2467ae7a83db7153bdc6faf520795fd0c (patch) | |
tree | c37be37cf29c08c1d425135d03b3c7fe86d0c532 /arch/arm/mach-at91/matrix.c | |
parent | 6f0a51aa68419280cffb0d0f78ca4c3936256eb4 (diff) | |
download | u-boot-imx-b5665bf2467ae7a83db7153bdc6faf520795fd0c.zip u-boot-imx-b5665bf2467ae7a83db7153bdc6faf520795fd0c.tar.gz u-boot-imx-b5665bf2467ae7a83db7153bdc6faf520795fd0c.tar.bz2 |
arm: at91/spl: matrix: use matrix slave id macros
To make matrix initialization code sharing with others,
use the matrix slave id macros, instead of hard-coding.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'arch/arm/mach-at91/matrix.c')
-rw-r--r-- | arch/arm/mach-at91/matrix.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c index e4780d6..57d7270 100644 --- a/arch/arm/mach-at91/matrix.c +++ b/arch/arm/mach-at91/matrix.c @@ -15,20 +15,20 @@ void matrix_init(void) struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1; int i; - /* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */ - for (i = 4; i <= 10; i++) { + /* DDR port 1 ~ port 7 */ + for (i = H64MX_SLAVE_DDRC_PORT1; i <= H64MX_SLAVE_DDRC_PORT7; i++) { writel(0x000f0f0f, &h64mx->ssr[i]); writel(0x0000ffff, &h64mx->sassr[i]); writel(0x0000000f, &h64mx->srtsr[i]); } - /* CS3 */ - writel(0x00c0c0c0, &h32mx->ssr[3]); - writel(0xff000000, &h32mx->sassr[3]); - writel(0xff000000, &h32mx->srtsr[3]); + /* EBI CS3 (NANDFlash 128M) and NFC Command Registers(128M) */ + writel(0x00c0c0c0, &h32mx->ssr[H32MX_SLAVE_EBI]); + writel(0xff000000, &h32mx->sassr[H32MX_SLAVE_EBI]); + writel(0xff000000, &h32mx->srtsr[H32MX_SLAVE_EBI]); /* NFC SRAM */ - writel(0x00010101, &h32mx->ssr[4]); - writel(0x00000001, &h32mx->sassr[4]); - writel(0x00000001, &h32mx->srtsr[4]); + writel(0x00010101, &h32mx->ssr[H32MX_SLAVE_NFC_SRAM]); + writel(0x00000001, &h32mx->sassr[H32MX_SLAVE_NFC_SRAM]); + writel(0x00000001, &h32mx->srtsr[H32MX_SLAVE_NFC_SRAM]); } |