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authorTom Rini <trini@ti.com>2014-11-24 12:02:12 -0500
committerTom Rini <trini@ti.com>2014-11-24 12:02:12 -0500
commitdee332ffb735f65ab922118791a583c17bb0b795 (patch)
treed07bc0821792831aa4baeb27868252c2d32c7738 /arch/arm/lib
parent1739564e753bc3a8097f8937a3cbe738bdaaed5d (diff)
parente7eb277dced570f177d75d56f40219d9dc599ed1 (diff)
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Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Diffstat (limited to 'arch/arm/lib')
-rw-r--r--arch/arm/lib/crt0.S5
-rw-r--r--arch/arm/lib/relocate.S73
2 files changed, 48 insertions, 30 deletions
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 823b233..22df3e5 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -104,6 +104,11 @@ clr_gd:
ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
b relocate_code
here:
+/*
+ * now relocate vectors
+ */
+
+ bl relocate_vectors
/* Set up final (full) environment */
diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S
index b4a258c..92f5314 100644
--- a/arch/arm/lib/relocate.S
+++ b/arch/arm/lib/relocate.S
@@ -11,6 +11,47 @@
#include <linux/linkage.h>
/*
+ * Default/weak exception vectors relocation routine
+ *
+ * This routine covers the standard ARM cases: normal (0x00000000),
+ * high (0xffff0000) and VBAR. SoCs which do not comply with any of
+ * the standard cases must provide their own, strong, version.
+ */
+
+ .section .text.relocate_vectors,"ax",%progbits
+ .weak relocate_vectors
+
+ENTRY(relocate_vectors)
+
+#ifdef CONFIG_HAS_VBAR
+ /*
+ * If the ARM processor has the security extensions,
+ * use VBAR to relocate the exception vectors.
+ */
+ ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
+ mcr p15, 0, r0, c12, c0, 0 /* Set VBAR */
+#else
+ /*
+ * Copy the relocated exception vectors to the
+ * correct address
+ * CP15 c1 V bit gives us the location of the vectors:
+ * 0x00000000 or 0xFFFF0000.
+ */
+ ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
+ mrc p15, 0, r2, c1, c0, 0 /* V bit (bit[13]) in CP15 c1 */
+ ands r2, r2, #(1 << 13)
+ ldreq r1, =0x00000000 /* If V=0 */
+ ldrne r1, =0xFFFF0000 /* If V=1 */
+ ldmia r0!, {r2-r8,r10}
+ stmia r1!, {r2-r8,r10}
+ ldmia r0!, {r2-r8,r10}
+ stmia r1!, {r2-r8,r10}
+#endif
+ bx lr
+
+ENDPROC(relocate_vectors)
+
+/*
* void relocate_code(addr_moni)
*
* This function relocates the monitor code.
@@ -54,34 +95,6 @@ fixnext:
cmp r2, r3
blo fixloop
- /*
- * Relocate the exception vectors
- */
-#ifdef CONFIG_HAS_VBAR
- /*
- * If the ARM processor has the security extensions,
- * use VBAR to relocate the exception vectors.
- */
- ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
- mcr p15, 0, r0, c12, c0, 0 /* Set VBAR */
-#else
- /*
- * Copy the relocated exception vectors to the
- * correct address
- * CP15 c1 V bit gives us the location of the vectors:
- * 0x00000000 or 0xFFFF0000.
- */
- ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
- mrc p15, 0, r2, c1, c0, 0 /* V bit (bit[13]) in CP15 c1 */
- ands r2, r2, #(1 << 13)
- ldreq r1, =0x00000000 /* If V=0 */
- ldrne r1, =0xFFFF0000 /* If V=1 */
- ldmia r0!, {r2-r8,r10}
- stmia r1!, {r2-r8,r10}
- ldmia r0!, {r2-r8,r10}
- stmia r1!, {r2-r8,r10}
-#endif
-
relocate_done:
#ifdef __XSCALE__
@@ -96,9 +109,9 @@ relocate_done:
/* ARMv4- don't know bx lr but the assembler fails to see that */
#ifdef __ARM_ARCH_4__
- mov pc, lr
+ mov pc, lr
#else
- bx lr
+ bx lr
#endif
ENDPROC(relocate_code)