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author | Aneesh V <aneesh@ti.com> | 2011-06-16 23:30:50 +0000 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-07-04 10:55:25 +0200 |
commit | e05f00792b71184428fdb34a303644a1e457f000 (patch) | |
tree | 6795b9334ef974e0f03ba55eb0cca01f4b58b372 /arch/arm/lib/cache.c | |
parent | c2dd0d45540397704de9b13287417d21049d34c6 (diff) | |
download | u-boot-imx-e05f00792b71184428fdb34a303644a1e457f000.zip u-boot-imx-e05f00792b71184428fdb34a303644a1e457f000.tar.gz u-boot-imx-e05f00792b71184428fdb34a303644a1e457f000.tar.bz2 |
arm: minor fixes for cache and mmu handling
1. make sure that page table setup is not done multiple times
2. flush_dcache_all() is more appropriate while disabling cache
than a range flush on the entire memory(flush_cache())
Provide a default implementation for flush_dcache_all()
for backward compatibility and to avoid build issues.
Signed-off-by: Aneesh V <aneesh@ti.com>
Diffstat (limited to 'arch/arm/lib/cache.c')
-rw-r--r-- | arch/arm/lib/cache.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index dc3242c..92b61a2 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -42,3 +42,14 @@ void __flush_cache(unsigned long start, unsigned long size) } void flush_cache(unsigned long start, unsigned long size) __attribute__((weak, alias("__flush_cache"))); + +/* + * Default implementation: + * do a range flush for the entire range + */ +void __flush_dcache_all(void) +{ + flush_cache(0, ~0); +} +void flush_dcache_all(void) + __attribute__((weak, alias("__flush_dcache_all"))); |