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authorWolfgang Denk <wd@denx.de>2010-10-28 20:35:36 +0200
committerWolfgang Denk <wd@denx.de>2010-10-29 21:39:59 +0200
commita9aa3926295df759306258e5e24cace414f53b67 (patch)
treeb63739471ef3aaebad27fd610f8394fee35120b5 /arch/arm/lib/cache-cp15.c
parent2e5167ccad93ca9cfa6a2acfab5e4785418e477e (diff)
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Drop support for CONFIG_SYS_ARM_WITHOUT_RELOC
When this define was introduced, the idea was to provide a soft migration path for ARM boards to get adapted to the new relocation support. However, other recent changes led to a different implementation (ELF relocation), where this no longer works. By now CONFIG_SYS_ARM_WITHOUT_RELOC does not only not help any more, but it actually hurts because it obfuscates the actual code by sprinkling it with lots of dead and non-working debris. So let's make a clean cut and drop CONFIG_SYS_ARM_WITHOUT_RELOC. Signed-off-by: Wolfgang Denk <wd@denx.de> Tested-by: Heiko Schocher <hs@denx.de> Tested-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Diffstat (limited to 'arch/arm/lib/cache-cp15.c')
-rw-r--r--arch/arm/lib/cache-cp15.c19
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index fe6d459..d9175f0 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -44,7 +44,6 @@ static void cp_delay (void)
asm volatile("" : : : "memory");
}
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
static inline void dram_bank_mmu_setup(int bank)
{
u32 *page_table = (u32 *)gd->tlb_addr;
@@ -58,18 +57,11 @@ static inline void dram_bank_mmu_setup(int bank)
page_table[i] = i << 20 | (3 << 10) | CACHE_SETUP;
}
}
-#endif
/* to activate the MMU we need to set up virtual memory: use 1M areas */
static inline void mmu_setup(void)
{
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
u32 *page_table = (u32 *)gd->tlb_addr;
-#else
- static u32 __attribute__((aligned(16384))) page_table[4096];
- bd_t *bd = gd->bd;
- int j;
-#endif
int i;
u32 reg;
@@ -77,20 +69,9 @@ static inline void mmu_setup(void)
for (i = 0; i < 4096; i++)
page_table[i] = i << 20 | (3 << 10) | 0x12;
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
dram_bank_mmu_setup(i);
}
-#else
- /* Then, enable cacheable and bufferable for RAM only */
- for (j = 0; j < CONFIG_NR_DRAM_BANKS; j++) {
- for (i = bd->bi_dram[j].start >> 20;
- i < (bd->bi_dram[j].start + bd->bi_dram[j].size) >> 20;
- i++) {
- page_table[i] = i << 20 | (3 << 10) | CACHE_SETUP;
- }
- }
-#endif
/* Copy the page table address to cp15 */
asm volatile("mcr p15, 0, %0, c2, c0, 0"