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authorvishnupatekar <vishnupatekar0510@gmail.com>2015-11-29 01:07:20 +0800
committerHans de Goede <hdegoede@redhat.com>2015-12-10 11:14:21 +0100
commitd5a3357f1bdf24a2c5df9bc219b963c09dd6c6b3 (patch)
treea2cf5403c756d1de2ef46f5918aaf118145012c3 /arch/arm/include
parent762e24a07871aec34fb3b5169dee309eb353861d (diff)
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sunxi: Add support for UART0 in PB pin group on A83T
On A83T, PB9,PB10 are UART0 pins. On allwinner A83T Dev board(h8homlet), this uart0 serial connector is exposed. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-sunxi/gpio.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 7af5e29..a2a9a38 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -158,6 +158,7 @@ enum sunxi_gpio_number {
#define SUN5I_GPB_UART0 2
#define SUN8I_GPB_UART2 2
#define SUN8I_A33_GPB_UART0 3
+#define SUN8I_A83T_GPB_UART0 2
#define SUNXI_GPC_NAND 2
#define SUNXI_GPC_SDC2 3