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author | Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> | 2015-12-22 16:48:43 +0530 |
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committer | York Sun <york.sun@nxp.com> | 2016-01-25 08:24:17 -0800 |
commit | aa4ba7f7a276566f4d0814c41314a629050c6208 (patch) | |
tree | dc4c5acee8e87f070701ee2a0bab44e7951fea07 /arch/arm/include | |
parent | 191e3c0527100cb980f0cd714f469b701d7050ae (diff) | |
download | u-boot-imx-aa4ba7f7a276566f4d0814c41314a629050c6208.zip u-boot-imx-aa4ba7f7a276566f4d0814c41314a629050c6208.tar.gz u-boot-imx-aa4ba7f7a276566f4d0814c41314a629050c6208.tar.bz2 |
armv8: ls2040a: Add support of LS2040A SoC
Freescale's LS2040A is a another personality of LS2080A SoC
without AIOP support consisting of 4 armv8 cores.
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com>
Acked-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 1 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/soc.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h index e030430..b10ee43 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h @@ -12,6 +12,7 @@ static struct cpu_type cpu_type_list[] = { CPU_TYPE_ENTRY(LS2085, LS2085, 8), CPU_TYPE_ENTRY(LS2045, LS2045, 4), CPU_TYPE_ENTRY(LS1043, LS1043, 4), + CPU_TYPE_ENTRY(LS2040, LS2040, 4), }; #ifndef CONFIG_SYS_DCACHE_OFF diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 1565592..ea78e15 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -45,6 +45,7 @@ struct cpu_type { #define SVR_LS2045 0x870120 #define SVR_LS2080 0x870110 #define SVR_LS2085 0x870100 +#define SVR_LS2040 0x870130 #define SVR_MAJ(svr) (((svr) >> 4) & 0xf) #define SVR_MIN(svr) (((svr) >> 0) & 0xf) |