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| author | Ye Li <ye.li@nxp.com> | 2017-02-14 10:30:18 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2017-04-05 17:24:32 +0800 |
| commit | cd293a66df0409c6d030c22f872353e8f2613f03 (patch) | |
| tree | f7570571e9a7b3ef46c012e9b5f8a8d961213dce /arch/arm/include | |
| parent | de38b748fcd138ddcae4dda2bcfbf04466c33d21 (diff) | |
| download | u-boot-imx-cd293a66df0409c6d030c22f872353e8f2613f03.zip u-boot-imx-cd293a66df0409c6d030c22f872353e8f2613f03.tar.gz u-boot-imx-cd293a66df0409c6d030c22f872353e8f2613f03.tar.bz2 | |
MLK-13923 mx7ulp: Fix PCC register bits mask and offset issue
The offset for FRAC and the mask for PCD are not correct. If we set FRAC, we
can't get the right frequency. Fix them to correct value.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 079db9559c06c5e68ab8f6cd67ec4f5115dd2d59)
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-mx7ulp/pcc.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-mx7ulp/pcc.h b/arch/arm/include/asm/arch-mx7ulp/pcc.h index 8a57175..fd0f933 100644 --- a/arch/arm/include/asm/arch-mx7ulp/pcc.h +++ b/arch/arm/include/asm/arch-mx7ulp/pcc.h @@ -290,10 +290,10 @@ enum pcc3_entry { #define PCC_INUSE_MASK (0x1 << PCC_INUSE_OFFSET) #define PCC_PCS_OFFSET 24 #define PCC_PCS_MASK (0x7 << PCC_PCS_OFFSET) -#define PCC_FRAC_OFFSET 4 +#define PCC_FRAC_OFFSET 3 #define PCC_FRAC_MASK (0x1 << PCC_FRAC_OFFSET) #define PCC_PCD_OFFSET 0 -#define PCC_PCD_MASK (0xf << PCC_PCD_OFFSET) +#define PCC_PCD_MASK (0x7 << PCC_PCD_OFFSET) enum pcc_clksrc_type { |