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authorJeroen Hofstee <jeroen@myspectrum.nl>2014-06-23 22:07:04 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-07-04 19:57:22 +0200
commitfcfddfd50472d7ce84ef4e2853242bbeb7b37325 (patch)
treec10c063cf385b22067fe1e7acce02ca0173ee722 /arch/arm/include
parentf749db3a75ec483692d7bb6d46a1fbecb65c38ba (diff)
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ARM: cache_v7: use __weak
This is not only more readable but also prevents a warning about a missing prototype. The prototypes which are actually missing are added. cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/cache.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index ddebbc8..a836e9f 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -29,6 +29,9 @@ void l2_cache_enable(void);
void l2_cache_disable(void);
void set_section_dcache(int section, enum dcache_option option);
+void arm_init_before_mmu(void);
+void arm_init_domains(void);
+void cpu_cache_initialization(void);
void dram_bank_mmu_setup(int bank);
#endif