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| author | York Sun <yorksun@freescale.com> | 2014-09-11 13:32:07 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-09-25 09:12:12 -0700 |
| commit | c7eae7fcb11bc7dab519fca8d8902f1fbc5c3c76 (patch) | |
| tree | 1a521d509a9752c0f279416c7d54c98c1d854068 /arch/arm/include | |
| parent | f80d6472b47e73e35e4eaed6fc56ce5df2c82cdb (diff) | |
| download | u-boot-imx-c7eae7fcb11bc7dab519fca8d8902f1fbc5c3c76.zip u-boot-imx-c7eae7fcb11bc7dab519fca8d8902f1fbc5c3c76.tar.gz u-boot-imx-c7eae7fcb11bc7dab519fca8d8902f1fbc5c3c76.tar.bz2 | |
board/ls1021aqds: Add DDR4 support
LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig
for this variant to enable DDR4 support. RAW timing parameters are not
added for DDR4. The board timing parameters are only tuned for single-
rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM
availability.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Alison Wang <alison.wang@freescale.com>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-ls102xa/config.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index ed78c33..a500b5b 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -50,7 +50,11 @@ #ifdef CONFIG_DDR_SPD #define CONFIG_SYS_FSL_DDR_BE #define CONFIG_VERY_BIG_RAM +#ifdef CONFIG_SYS_FSL_DDR4 +#define CONFIG_SYS_FSL_DDRC_GEN4 +#else #define CONFIG_SYS_FSL_DDRC_ARM_GEN3 +#endif #define CONFIG_SYS_FSL_DDR #define CONFIG_SYS_LS1_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS1_DDR_BLOCK1_SIZE @@ -71,6 +75,7 @@ #define CONFIG_MAX_CPUS 2 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_NUM_DDR_CONTROLLERS 1 +#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 #else #error SoC not defined #endif |