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authorHatim RV <hatim.rv@samsung.com>2012-11-02 01:15:34 +0000
committerMinkyu Kang <mk7.kang@samsung.com>2012-11-15 21:08:20 +0900
commitb56b304252414805f4c450f7730821cb885f5ef0 (patch)
treeac92bf94712105eb7d07aa428310ad891897a698 /arch/arm/include
parentfbb574330885d9f48c9e846970a912912f23f4fd (diff)
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EXYNOS: Add clock for SPI
Add api to calculate and set the clock for SPI channels Signed-off-by: James Miller <jamesmiller@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-exynos/clk.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-exynos/clk.h b/arch/arm/include/asm/arch-exynos/clk.h
index 2bf2c10..cd12323 100644
--- a/arch/arm/include/asm/arch-exynos/clk.h
+++ b/arch/arm/include/asm/arch-exynos/clk.h
@@ -41,5 +41,6 @@ void set_mipi_clk(void);
void set_i2s_clk_source(void);
int set_i2s_clk_prescaler(unsigned int src_frq, unsigned int dst_frq);
int set_epll_clk(unsigned long rate);
+int set_spi_clk(int periph_id, unsigned int rate);
#endif