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authorSteve Sakoman <steve@sakoman.com>2010-08-18 07:34:09 -0700
committerSandeep Paulraj <s-paulraj@ti.com>2010-09-08 14:50:58 -0400
commit7c281c985c33318d0795e43909e0d26f870f98ed (patch)
treed014bf530dea40fcc56703cff19aa3a5c27f67b2 /arch/arm/include
parentb2b9169f0bc860ac34d7828df8730744394d8f6e (diff)
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ARMV7: OMAP3: Add clock setup for OMAP36XX/37XX
This patch configures clocks properly when a 36XX/37XX processor is detected. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-omap3/clocks.h17
-rw-r--r--arch/arm/include/asm/arch-omap3/clocks_omap3.h27
2 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-omap3/clocks.h b/arch/arm/include/asm/arch-omap3/clocks.h
index 71a0cb6..40f80ba 100644
--- a/arch/arm/include/asm/arch-omap3/clocks.h
+++ b/arch/arm/include/asm/arch-omap3/clocks.h
@@ -51,12 +51,29 @@ typedef struct {
unsigned int m2;
} dpll_param;
+struct dpll_per_36x_param {
+ unsigned int sys_clk;
+ unsigned int m;
+ unsigned int n;
+ unsigned int m2;
+ unsigned int m3;
+ unsigned int m4;
+ unsigned int m5;
+ unsigned int m6;
+ unsigned int m2div;
+};
+
/* Following functions are exported from lowlevel_init.S */
extern dpll_param *get_mpu_dpll_param(void);
extern dpll_param *get_iva_dpll_param(void);
extern dpll_param *get_core_dpll_param(void);
extern dpll_param *get_per_dpll_param(void);
+extern dpll_param *get_36x_mpu_dpll_param(void);
+extern dpll_param *get_36x_iva_dpll_param(void);
+extern dpll_param *get_36x_core_dpll_param(void);
+extern dpll_param *get_36x_per_dpll_param(void);
+
extern void *_end_vect, *_start;
#endif
diff --git a/arch/arm/include/asm/arch-omap3/clocks_omap3.h b/arch/arm/include/asm/arch-omap3/clocks_omap3.h
index 661407b..30ef690 100644
--- a/arch/arm/include/asm/arch-omap3/clocks_omap3.h
+++ b/arch/arm/include/asm/arch-omap3/clocks_omap3.h
@@ -282,4 +282,31 @@
#define PER_FSEL_38P4 0x07
#define PER_M2_38P4 0x09
+/* 36XX PER DPLL */
+
+#define PER_36XX_M_12 0x1B0
+#define PER_36XX_N_12 0x05
+#define PER_36XX_FSEL_12 0x07
+#define PER_36XX_M2_12 0x09
+
+#define PER_36XX_M_13 0x360
+#define PER_36XX_N_13 0x0C
+#define PER_36XX_FSEL_13 0x03
+#define PER_36XX_M2_13 0x09
+
+#define PER_36XX_M_19P2 0x1C2
+#define PER_36XX_N_19P2 0x09
+#define PER_36XX_FSEL_19P2 0x07
+#define PER_36XX_M2_19P2 0x09
+
+#define PER_36XX_M_26 0x1B0
+#define PER_36XX_N_26 0x0C
+#define PER_36XX_FSEL_26 0x07
+#define PER_36XX_M2_26 0x09
+
+#define PER_36XX_M_38P4 0x1C2
+#define PER_36XX_N_38P4 0x13
+#define PER_36XX_FSEL_38P4 0x07
+#define PER_36XX_M2_38P4 0x09
+
#endif /* endif _CLOCKS_OMAP3_H_ */