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author | Stephen Warren <swarren@nvidia.com> | 2015-03-25 12:04:36 -0600 |
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committer | Tom Warren <twarren@nvidia.com> | 2015-03-30 09:54:06 -0700 |
commit | 5ee7ec7bafe6d02ebacdde06bb536f55cff4cdd8 (patch) | |
tree | 000ec65a9389015113e485b01f43b850d955e31a /arch/arm/include | |
parent | c21478bc6e527f57cb2e3251c7d6baa3e54514c2 (diff) | |
download | u-boot-imx-5ee7ec7bafe6d02ebacdde06bb536f55cff4cdd8.zip u-boot-imx-5ee7ec7bafe6d02ebacdde06bb536f55cff4cdd8.tar.gz u-boot-imx-5ee7ec7bafe6d02ebacdde06bb536f55cff4cdd8.tar.bz2 |
ARM: tegra: pinctrl: add support for MIPI PAD control groups
Some pinmux controls are in a different register set. Add support for
manipulating those in a similar way to existing pins/groups.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/arch-tegra/pinmux.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra/pinmux.h b/arch/arm/include/asm/arch-tegra/pinmux.h index e3eb706..3cc52dd 100644 --- a/arch/arm/include/asm/arch-tegra/pinmux.h +++ b/arch/arm/include/asm/arch-tegra/pinmux.h @@ -229,4 +229,20 @@ void pinmux_config_drvgrp_table(const struct pmux_drvgrp_config *config, #endif /* TEGRA_PMX_SOC_HAS_DRVGRPS */ +#ifdef TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS +struct pmux_mipipadctrlgrp_config { + u32 grp:16; /* pin group PMUX_MIPIPADCTRLGRP_x */ + u32 func:8; /* function to assign PMUX_FUNC_... */ +}; + +void pinmux_config_mipipadctrlgrp_table( + const struct pmux_mipipadctrlgrp_config *config, int len); + +struct pmux_mipipadctrlgrp_desc { + u8 funcs[2]; +}; + +extern const struct pmux_mipipadctrlgrp_desc *tegra_soc_mipipadctrl_groups; +#endif /* TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS */ + #endif /* _TEGRA_PINMUX_H_ */ |